A Parallel Test Method for MCM Substrate Interconnection Networks

International Journal of Microcircuits and Electronic Packaging

Volumn 21, Issue 2, 1998, Pages 197-204

  Newman, K E ^a   Keezer, D C ^a   Davis, J S ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Interconnect Testing; Multichip Modules; Parallel Test

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS; INTERCONNECTION NETWORKS; SUBSTRATES;

PARALLEL TEST METHODS;

MULTICHIP MODULES;

EID: 0032083690     PISSN: 10631674     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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