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Volumn 11, Issue 2, 1998, Pages 211-216

Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices

Author keywords

Charge injection; GIDL; Plasma damaga; Reliability; Submicron MOSFET's

Indexed keywords

GATES (TRANSISTOR); INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; LEAKAGE CURRENTS; PLASMA ETCHING;

EID: 0032070325     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/66.670162     Document Type: Article
Times cited : (5)

References (10)
  • 1
    • 0026993978 scopus 로고
    • Dependence of plasma-induced oxide charging current on AI antenna geometry
    • H. Shin and C. Hu, "Dependence of plasma-induced oxide charging current on AI antenna geometry," IEEE Electron Device Lett., vol. 13, p. 600, 1992.
    • (1992) IEEE Electron Device Lett. , vol.13 , pp. 600
    • Shin, H.1    Hu, C.2
  • 2
    • 0001224185 scopus 로고    scopus 로고
    • Evaluation of plasma damage using fully processed metal-oxide-semiconductor transistors
    • X. Li, T. Brozek, F. Preuninger, D. Chan, and C. R. Viswanathan, "Evaluation of plasma damage using fully processed metal-oxide-semiconductor transistors," J. Vac. Sci. Technol. B, vol. 14, no. 1, p. 571, 1996.
    • (1996) J. Vac. Sci. Technol. B , vol.14 , Issue.1 , pp. 571
    • Li, X.1    Brozek, T.2    Preuninger, F.3    Chan, D.4    Viswanathan, C.R.5
  • 3
    • 0029490915 scopus 로고
    • Role of temperature in process-induced charging damage in submicron CMOS transistors
    • T. Brozek, Y. D. Chan, and C. R. Viswanathan, "Role of temperature in process-induced charging damage in submicron CMOS transistors," in IEEE IEDM Tech. Dig., 1995, p. 311.
    • (1995) IEEE IEDM Tech. Dig. , pp. 311
    • Brozek, T.1    Chan, Y.D.2    Viswanathan, C.R.3
  • 4
    • 5844426576 scopus 로고
    • Modeling and simulation of plasma processes
    • D. Graves and M. Surendra, "Modeling and simulation of plasma processes," in IEEE IEDM Tech. Dig., 1991, p. 887.
    • (1991) IEEE IEDM Tech. Dig. , pp. 887
    • Graves, D.1    Surendra, M.2
  • 5
    • 0028460611 scopus 로고
    • Using SEMATECH electrical test structures in assessing plasma induced damage in poly etching
    • Y. D. Chan, "Using SEMATECH electrical test structures in assessing plasma induced damage in poly etching," Jpn. J. Appl. Phys., vol. 33, p. 4458, 1994.
    • (1994) Jpn. J. Appl. Phys. , vol.33 , pp. 4458
    • Chan, Y.D.1
  • 6
    • 0043255687 scopus 로고
    • Plasma etching charge-up damage to thin oxides
    • H. Shin et al., "Plasma etching charge-up damage to thin oxides," Solid State Technol., vol. 36, p. 29, 1993.
    • (1993) Solid State Technol. , vol.36 , pp. 29
    • Shin, H.1
  • 7
    • 0029493271 scopus 로고
    • LDD charge pumping-direct measurement of Interface States in the overlap region
    • V. Prabhakar, T. Brozek, Y. D. Chan, and C. R. Viswanathan, "LDD charge pumping-direct measurement of Interface States in the overlap region," in IEEE IEDM Tech. Dig., 1995, p. 45.
    • (1995) IEEE IEDM Tech. Dig. , pp. 45
    • Prabhakar, V.1    Brozek, T.2    Chan, Y.D.3    Viswanathan, C.R.4
  • 9
    • 0029238073 scopus 로고
    • Degraded CMOS hot carrier life time-role of plasma etching induced charging damage and edge damage
    • Las Vegas, NV
    • X. Li, T. Brozek, P. Aum, D. Chan, and C. R. Viswanathan, "Degraded CMOS hot carrier life time-role of plasma etching induced charging damage and edge damage," in Proc. IRPS, Las Vegas, NV, 1995, p. 260.
    • (1995) Proc. IRPS , pp. 260
    • Li, X.1    Brozek, T.2    Aum, P.3    Chan, D.4    Viswanathan, C.R.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.