Clock-controlled neuron-mos logic gates

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 4, 1998, Pages 518-522

  Kotani, Koji ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

Auto zero; Clock controlled logic; Latched sense amplifier; Neuron mos

Indexed keywords

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; MOSFET DEVICES; TIMING CIRCUITS;

CLOCK CONTROLLED LOGIC; LATCHED SENSE AMPLIFIERS;

LOGIC GATES;

EID: 0032047546     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.663810     Document Type: Article

References (11)

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