Image sensor with image smoothing capability using a neuron MOSFET

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 2172, Issue , 1994, Pages 30-37

  Nakamura, Jun Ichi ^a   Fossum, Eric R ^b  

^a Olympus America Inc ^*  (United States)

^b CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHARGE COUPLED DEVICES; COMPUTER CIRCUITS; IMAGE SENSORS; NEURONS; OPTICAL SENSORS; PIXELS; SIGNAL DETECTION; SOLID-STATE SENSORS; SPICE;

ACTIVE PIXEL SENSOR; ARRAY CONFIGURATIONS; CAPACITANCE VALUES; CAPACITIVELY COUPLED; DRIVING CAPABILITY; FILTER CHARACTERISTICS; MULTIPLE INPUTS; SPICE SIMULATIONS;

MOSFET DEVICES;

EID: 33747726247     PISSN: 0277786X     EISSN: 1996756X     Source Type: Conference Proceeding    
DOI: 10.1117/12.172770     Document Type: Conference Paper

References (7)

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2. E. R. Fossum, "Active pixel sensors: Are CCD's dinosaurs?", Proc. SPIE vol. 1900, pp. 2-14, 1993.
3. J. Nakamura, Y. Gomi, M. Uno and H. Hayashi, "Nondestructive readout mode static induction transistor (SIT) photo sensors", IEEE Trans, on Electron Devices, vol. 40, No. 2, pp. 334-341, February 1993
4. I. Takayanagi, T. Isokawa, F. Nakamura and J. Nakamura, "A multiple output CMD imager for real-time image processing", IEDM Tech. Dig., pp. 579-582, 1993.
5. T. Shibata and T. Ohmi, "An intelligent MOS transistor featuring gate-level weighted sum and threshold operations", IEDM Tech. Dig., pp. 919-922, 1991.
6. T. Shibata and T. Ohmi, "A functional MOS transistor featuring gate-level weighted sum and threshold operations", IEEE Trans, on Electron Devices, vol. 39, no. 6, pp. 1444-1455, June 1992.
7. C. Mead, Analog VLSI and Neural Systems Chapter 15, Addison Wesley, 1989.