A new device design methodology for manufacturability

IEEE Transactions on Electron Devices

Volumn 45, Issue 3, 1998, Pages 634-642

  Lu, Jye Chyi ^a,b   Holton, William C ^a,b   Fenner, Joel S ^a,b   Williams, Stewart C ^a,b   Kim, Ki Wook ^a,b   Hartford, Alan H ^a,b   Chen, Di ^a,b   Roze, Ksenia ^a,b   Littlejohn, Michael A ^a,b  

^a NORTH CAROLINA STATE UNIVERSITY   (United States)

^b North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; LEAKAGE CURRENTS; LEAST SQUARES APPROXIMATIONS; MOSFET DEVICES; OPTIMIZATION; SEMICONDUCTOR DEVICE MODELS;

OPTIMUM DESIGN FOR MANUFACTURABILITY (OFDM);

INTEGRATED CIRCUIT LAYOUT;

EID: 0032022640     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.661225     Document Type: Article

References (17)

1. A. R. Alvarez, B. L. Abdi, D. L. Young, H. D. Weed, J. Teplik, and E. R. Herald, "Application of statistical design and response surface methods to computer-aided VLSI device design,"IEEE Trans. Computer-Aided Design, vol. 7, pp. 272-288, 1988.
2. N. A. C. Cressie, Statistics for Spatial Data. New York: Wiley, 1991.
3. K. Hasnat, S. Murtaza, and A. F. Tasch, "A manufacturing sensitivity analysis of 0.35-ftm LDD MOSFET's,"IEEE Trans. Semiconduct. Manufact.. vol. 7, pp. 53-59, 1994.
4. T. J. Sanders, K. Rekab, F. M. Rotella, and D. P. Means, "Integrated circuit design for manufacturing through statistical simulation of process steps,"IEEE Trans. Semiconduct. Manufact., vol. 5, pp. 368-372, 1992.
5. K. K. Low and S. W. Director, "An efficient methodology for building macromodels of 1C fabrication processes,"IEEE Trans. Computer-Aided Design, vol. 8, pp. 1299-1313, 1989.
6. Y. Aoki, H. Masuda, S. Shimada, and S. Sato, "A new design-centering methodology for VLSI device development,"IEEE Trans. ComputerAided Design, vol. CAD-6, pp. 452-161, 1987.
7. M. D. McKay, W. J. Conover, and R. J. Beckman, "A comparison of three methods for selecting values of input variables in the analysis of outputs from a computer code,"Technometrics, vol. 21, pp. 239-245, 1979.
8. S. Sharifzadeh, J. R. Koehler, A. B. Owen, and J. D. Shott, "Using simulators to model transmitted variability in 1C manufacturing,"IEEE Trans. Semiconduct. Manufact., vol. 2, pp. 82-93, 1989.
9. P. Haaland, N. McMillan, D. Nychka, and W. Welch, "Analysis of space-filling designs,"inProc. 26th Symp. Interface, 1994, vol. 26, pp. 111-120.
10. C. Currin, T. Mitchell, M. Morris, and D. Ylvisaker, "A bayesian approach to the design and analysis of computer experiments,"Oak Ridge National Laboratory, Oak Ridge, TN, Tech. Rep. 6489, 1988.
11. K. T. Fang and Y. Wang, Number Theoretical Methods in Statistics. New York: Chapman & Hall, 1992.
12. J. Sacks, W. J. Welch, T. J. Mitchell, and H. P. Wynn, "Design and analysis of computer experiments,"Statist. Sci., vol. 4, pp. 409-135, 1989.
13. B. Tang, "Orthogonal array-based latin hypercubes,"J. American Statistical Assoc., vol. 88, pp. 1392-1397, 1993.
14. J. Sacks, S. B. Schiller, and W. J. Welch, "Design for computer experiments,"Technometrics, vol. 31, pp. 41-17, 1989.
15. N. Draper and H. Smith, Applied Regression Analysis, 2nd ed. New York: Wiley, 1981.
16. J. J. Ellis-Monaghan, R. B. Hulfachor, K. W. Kirn, and M. A. Littlejohn, "Ensemble Monte Carlo study of interface-state generation in lowvoltage scaled silicon MOS devices,"IEEE Trans. Electron Devices, vol. 43, pp. 1123-1132, 1996.
17. MEDICI Manual, Technology Modeling Associates, Inc., Palo Alto, CA, 1995.