Design of self-testing checkers for m-out-of-n codes using parallel counters

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 12, Issue 1-2, 1998, Pages 63-68

  Piestrak, StanisŁaw J ^a  

^a WROCLAW UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

Concurrent error detection; Counters of 1s; M out of n (m n) codes; On line testing; Parallel counters; Self checking circuit; Self testing checker; Unidirectional errors; Unordered codes

Indexed keywords

ADDERS; CODES (SYMBOLS); COUNTING CIRCUITS; ERROR DETECTION; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; ONLINE SYSTEMS;

CONCURRENT ERROR DETECTION; ONLINE TESTING; PARALLEL COUNTERS; SELF CHECKING CIRCUITS; SELF TESTING CHECKERS;

DETECTOR CIRCUITS;

EID: 0032000322     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008273606127     Document Type: Article

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