Requirements on ATM switch architectures for quality-of-service guarantees

IEICE Transactions on Communications

Volumn E81-B, Issue 2, 1998, Pages 138-151

  Murata, Masayuki ^a  

^a OSAKA UNIVERSITY   (Japan)

Author keywords

ATM switch architecture; Buffering strategy; Congestion control; QoS service class; QoS service guarantee

Indexed keywords

CONGESTION CONTROL (COMMUNICATION); SWITCHING SYSTEMS; TELECOMMUNICATION SERVICES;

BUFFERING STRATEGY; QUALITY OF SERVICE (QOS);

ASYNCHRONOUS TRANSFER MODE;

EID: 0031999460     PISSN: 09168516     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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