Utilization of on-line (concurrent) checkers during built-in self-test and vice versa

IEEE Transactions on Computers

Volumn 45, Issue 1, 1996, Pages 63-73

  Gupta, Sandeep K ^b   Pradhan, Dhiraj K ^a,c  

^a IEEE

^b University of Southern California ^*  (United States)

^c TEXAS A AND M UNIVERSITY   (United States)

Author keywords

BIST; Built in self test; Concurrent checking; Fault escape probability; Parity prediction

Indexed keywords

EID: 0040814369     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.481487     Document Type: Article

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