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Volumn C-26, Issue 8, 1977, Pages 737-744

On Totally Self-Checking Checkers for Separable Codes

Author keywords

Berger codes; residue codes; separable codes; totally self checking checkers; unidirectional faults

Indexed keywords

CODES, SYMBOLIC;

EID: 0017524659     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1977.1674911     Document Type: Article
Times cited : (61)

References (34)
  • 1
    • 0001305152 scopus 로고
    • Design of dynamically checked computers
    • Edinburgh, Scotland, Aug.
    • W. C. Carter and P. R. Schneider, “Design of dynamically checked computers,” in 1968 Proc. IFIP, vol. 2, Edinburgh, Scotland, Aug. 1968, pp. 878–883.
    • (1968) 1968 Proc. IFIP , vol.2 , pp. 878-883
    • Carter, W.C.1    Schneider, P.R.2
  • 3
    • 0003582752 scopus 로고
    • Design of self-checking digital networks using coding techniques
    • Coordinated Sci. Lab., Univ. Illinois, Urbana, Rep. R-527, Sept.
    • D. A. Anderson, “Design of self-checking digital networks using coding techniques,” Coordinated Sci. Lab., Univ. Illinois, Urbana, Rep. R-527, Sept. 1971.
    • (1971)
    • Anderson, D.A.1
  • 4
    • 0015604443 scopus 로고
    • Design of totally-self-checking check circuits for m-out-of-n codes
    • Mar.
    • D. A. Anderson and G. Metze, “Design of totally-self-checking check circuits for m-out-of-n codes,” IEEE Trans. Comput., vol. C-22, pp. 263–269, Mar. 1973.
    • (1973) IEEE Trans. Comput. , vol.C-22 , pp. 263-269
    • Anderson, D.A.1    Metze, G.2
  • 5
    • 0015161284 scopus 로고
    • A simple self-testing decoder checking circuit
    • Nov.
    • W. C. Carter, K. A. Duke, and D. C. Jessep, “A simple self-testing decoder checking circuit,” IEEE Trans. Comput., vol. C-20, pp. 1413–1414, Nov. 1971.
    • (1971) IEEE Trans. Comput. , vol.C-20 , pp. 1413-1414
    • Carter, W.C.1    Duke, K.A.2    Jessep, D.C.3
  • 6
    • 3342912307 scopus 로고
    • Implementation of checkable, acyclic automata by morphic Boolean functions
    • MRI Symp., Polytechnic Institute of Brooklyn, New York, NY, July
    • W. C. Carter, A. B. Wadia, and D. C. Jessep, “Implementation of checkable, acyclic automata by morphic Boolean functions,” in Proc. Symp. Computers and Automata, MRI Symp., Polytechnic Institute of Brooklyn, New York, NY, July 1971, pp. 465–482.
    • (1971) Proc. Symp. Computers and Automata , pp. 465-482
    • Carter, W.C.1    Wadia, A.B.2    Jessep, D.C.3
  • 7
    • 0016115597 scopus 로고
    • A note on self-checking checkers
    • Oct.
    • S. M. Reddy, “A note on self-checking checkers,” IEEE Trans. Comput., vol. C-23, pp. 1100–1102, Oct. 1974.
    • (1974) IEEE Trans. Comput. , vol.C-23 , pp. 1100-1102
    • Reddy, S.M.1
  • 8
    • 0015604392 scopus 로고
    • Lookaside techniques for minimum circuit memory translators
    • Mar.
    • W. C. Carter, K. A. Duke, and D. C. Jessep, Jr., “Lookaside techniques for minimum circuit memory translators,” IEEE Trans. Comput., vol. C-22, pp. 283–289, Mar. 1973.
    • (1973) IEEE Trans. Comput. , vol.C-22 , pp. 283-289
    • Carter, W.C.1    Duke, K.A.2    Jessep, D.C.3
  • 9
    • 84937651961 scopus 로고
    • Investigations into the design of dynamically checked arithmetic units
    • Ph.D. dissertation, Harvard University, Cambridge, MA, Jan. also, IBM Res. Rep. RC2787
    • A. B. Wadia, “Investigations into the design of dynamically checked arithmetic units,” Ph.D. dissertation, Harvard University, Cambridge, MA, Jan. 1970; also, IBM Res. Rep. RC2787.
    • (1970)
    • Wadia, A.B.1
  • 13
    • 84937653793 scopus 로고
    • Memory and use of checking circuits
    • INFO-TECH Rep. 20
    • W. C. Carter, “Memory and use of checking circuits,” INFO-TECH Rep. 20, 1974.
    • (1974)
    • Carter, W.C.1
  • 14
    • 84936893885 scopus 로고
    • Design of totally-self-checking and fail-safe sequential machines
    • Univ. Illinois, Urbana, June
    • M. Diaz, “Design of totally-self-checking and fail-safe sequential machines,” in 1974 Dig. Int. Symp. Fault-Tolerant Computing, Univ. Illinois, Urbana, June 1974.
    • (1974) 1974 Dig. Int. Symp. Fault-Tolerant Computing
    • Diaz, M.1
  • 15
    • 0016082377 scopus 로고
    • Partially self-checking circuits and their use in performing logical operations
    • July
    • J. F. Wakerly, “Partially self-checking circuits and their use in performing logical operations,” IEEE Trans. Comput., vol. C-23, pp. 658–667, July 1974.
    • (1974) IEEE Trans. Comput. , vol.C-23 , pp. 658-667
    • Wakerly, J.F.1
  • 16
    • 84937079048 scopus 로고    scopus 로고
    • Low cost error detection techniques for small computers
    • NTIS, U.S. Department of Commerce, Springfield, VA, Document PB-232 356
    • J. F. Wakerly, “Low cost error detection techniques for small computers,” NTIS, U.S. Department of Commerce, Springfield, VA, Document PB-232 356.
    • Wakerly, J.F.1
  • 17
    • 0003035229 scopus 로고
    • A note on error detection codes for asymmetric channels
    • Mar.
    • J. M. Berger, “A note on error detection codes for asymmetric channels,” Inform. Contr., vol. 4, pp. 68–73, Mar. 1961.
    • (1961) Inform. Contr. , vol.4 , pp. 68-73
    • Berger, J.M.1
  • 18
    • 0015160450 scopus 로고
    • Arithmetic codes: Cost and effectiveness studies for application in digital system design
    • Nov.
    • A. Avizienis, “Arithmetic codes: Cost and effectiveness studies for application in digital system design,” IEEE Trans. Comput., vol. C-20, pp. 1322–1331, Nov. 1971.
    • (1971) IEEE Trans. Comput. , vol.C-20 , pp. 1322-1331
    • Avizienis, A.1
  • 20
    • 84936897950 scopus 로고
    • Reliability of integrated circuits
    • Washington, DC, June
    • R. M. Sahni, “Reliability of integrated circuits,” in Proc. 1970 IEEE Int. Comput. Group Conf., Washington, DC, June 1970, pp. 213–219.
    • (1970) Proc. 1970 IEEE Int. Comput. Group Conf. , pp. 213-219
    • Sahni, R.M.1
  • 21
    • 0015602519 scopus 로고
    • Design of a self-checking microprogram control
    • Mar.
    • R. W. Cook, W. H. Sisson, T. F. Storey, and W. N. Toy, “Design of a self-checking microprogram control,” IEEE Trans. Comput., vol. C-22, pp. 255–262, Mar. 1973.
    • (1973) IEEE Trans. Comput. , vol.C-22 , pp. 255-262
    • Cook, R.W.1    Sisson, W.H.2    Storey, T.F.3    Toy, W.N.4
  • 22
    • 0015622896 scopus 로고
    • The design of a microprogrammed self-checking processor of an electronic switching system
    • May
    • H. Y. Chang, R. C. Dorr, and D. J. Senese, “The design of a microprogrammed self-checking processor of an electronic switching system,” IEEE Trans. Comput., vol. C-22, pp. 501–512, May 1973.
    • (1973) IEEE Trans. Comput. , vol.C-22 , pp. 501-512
    • Chang, H.Y.1    Dorr, R.C.2    Senese, D.J.3
  • 26
    • 0016472264 scopus 로고
    • Detection of unidirectional multiple errors using low-cost arithmetic codes
    • Feb.
    • J. F. Wakerly, “Detection of unidirectional multiple errors using low-cost arithmetic codes,” IEEE Trans. Comput., vol. C-24, pp. 210–212, Feb. 1975.
    • (1975) IEEE Trans. Comput. , vol.C-24 , pp. 210-212
    • Wakerly, J.F.1
  • 28
    • 84937654137 scopus 로고    scopus 로고
    • Checked binary addition using check symbol prediction and checksum codes
    • to be published
    • J. F. Wakerly, “Checked binary addition using check symbol prediction and checksum codes,” to be published.
    • Wakerly, J.F.1
  • 29
    • 34848912349 scopus 로고
    • Design of self-checking microprogrammed controls
    • M. Diaz, and J. M. De Soiza, “Design of self-checking microprogrammed controls,” in Dig. FTC5, June 1975, pp. 137–142.
    • (1975) Dig. FTC5 , pp. 137-142
    • Diaz, M.1    De Soiza, J.M.2
  • 30
    • 84937646126 scopus 로고    scopus 로고
    • Self-testing residue trees
    • Digital Syst. Lab., Stanford Univ., Stanford, CA, Tech. Rep. 49
    • S. G. Kolupaev, “Self-testing residue trees,” Digital Syst. Lab., Stanford Univ., Stanford, CA, Tech. Rep. 49.
    • Kolupaev, S.G.1
  • 32
    • 0038561789 scopus 로고
    • Generalized parity checking
    • Sept.
    • H. L. Garner, “Generalized parity checking,” IRE Trans. Electron. Comput., pp. 207–213, Sept. 1958.
    • (1958) IRE Trans. Electron. Comput. , pp. 207-213
    • Garner, H.L.1
  • 33
    • 84937649158 scopus 로고
    • Arithmetic algorithms for error-coded operands
    • Newton, MA, June
    • A. Avizianis, “Arithmetic algorithms for error-coded operands,” in 1972 Digt. Int. Symp. Fault-Tolerant Computing, Newton, MA, June 1972, pp. 25–29.
    • (1972) 1972 Digt. Int. Symp. Fault-Tolerant Computing , pp. 25-29
    • Avizianis, A.1
  • 34
    • 84937651929 scopus 로고
    • Totally-self-checking check circuits for separable codes
    • Ph.D. dissertation, Dep. Elec. Eng., Univ. Iowa, Iowa City, July
    • M. J. Ashjaee, “Totally-self-checking check circuits for separable codes,” Ph.D. dissertation, Dep. Elec. Eng., Univ. Iowa, Iowa City, July 1976.
    • (1976)
    • Ashjaee, M.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.