메뉴 건너뛰기




Volumn Part F133492, Issue , 1998, Pages 666-673

Electrical evaluation of flip-chip package alternatives for next generation microprocessors

Author keywords

[No Author keywords available]

Indexed keywords

BALL GRID ARRAYS; CERAMIC MATERIALS; CHIP SCALE PACKAGES; FLIP CHIP DEVICES; NETWORK COMPONENTS; CAPACITORS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS; THIN FILMS;

EID: 0031625565     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.1998.678769     Document Type: Conference Paper
Times cited : (3)

References (5)
  • 4
    • 0031197351 scopus 로고    scopus 로고
    • Measurement, modeling, simulation of flip-chip CMOS ASIC simultaneous switching noise on a multilayer ceramic BGA
    • August
    • J. Libous and D. O'Connor, "Measurement, modeling, simulation of flip-chip CMOS ASIC simultaneous switching noise on a multilayer ceramic BGA, " IEEE Transaction on Components, Packaging, Manufacturing Technology part B, vol. 20, pp. 266-271, August 1997.
    • (1997) IEEE Transaction on Components, Packaging, Manufacturing Technology Part B , vol.20 , pp. 266-271
    • Libous, J.1    O'Connor, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.