A DSM design flow: Putting floorplanning, technology-mapping, and gate-placement together

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 128-133

  Salek, Amir H ^a   Lou, Jinan ^a   Pedram, Massoud ^a  

^a University of Southern California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MAPPING; ALGORITHMS; BENCHMARKING; COMPUTATIONAL COMPLEXITY; CRITICAL PATH ANALYSIS; DYNAMIC PROGRAMMING; GATES (TRANSISTOR); TREES (MATHEMATICS);

CRITICAL PATHS; DYNAMIC PROGRAMMING ALGORITHM; FLOOR-PLANNING; GATE PLACEMENT; INTEGRATED DESIGN FLOW; REPEATED APPLICATION; SHAPE FUNCTIONS; TECHNOLOGY MAPPING;

DYNAMIC PROGRAMMING; INTEGRATED CIRCUIT LAYOUT;

DEEP-SUB-MICRON (DSM) DESIGN FLOW; FLOORPLANNING; TECHNOLOGY MAPPING (TM);

EID: 0031624148     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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