메뉴 건너뛰기




Volumn , Issue , 1998, Pages 668-671

A reconfigurable logic machine for fast event-driven simulation

Author keywords

Event driven simulation; Reconfigurable computing

Indexed keywords

COMPUTATION THEORY; COMPUTER SOFTWARE; RECONFIGURABLE ARCHITECTURES; VERIFICATION; COMPUTER SIMULATION; ELECTRIC NETWORK SYNTHESIS; LOGIC CIRCUITS; VLSI CIRCUITS;

EID: 0031622739     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277214     Document Type: Conference Paper
Times cited : (23)

References (14)
  • 7
    • 84941512823 scopus 로고    scopus 로고
    • Inmos, Inmos document 72 TRN 203 02. Order code DBTRANST/3
    • Inmos, The Transputer Databook, Inmos document 72 TRN 203 02. Order code DBTRANST/3.
    • The Transputer Databook
  • 9
    • 84895387460 scopus 로고
    • Oxford University Hardware Compilatoin Group, available from URL
    • Page, I. The HARP Reconfigurable Computing System, Oxford University Hardware Compilatoin Group, 1994, available from URL:http://www.comlab.ox.ac.uk/oucl/users/ian.page/papers.html.
    • (1994) The HARP Reconfigurable Computing System
    • Page, I.1
  • 10
    • 85053109816 scopus 로고
    • Reconfigurable processors
    • April, available from-URL
    • Page, I. Reconfigurable Processors, Invited Keynote Address for Heathrow PLD Conference, April 1995, available from-URL:http://www.cornlab.ox.ac.uk/oucl/users/ian.page/papers.html.
    • (1995) Invited Keynote Address for Heathrow PLD Conference
    • Page, I.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.