A flexible processor architecture for MPEG-4 image compositing

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 5, Issue , 1998, Pages 3153-3156

  Berekovic, M ^a   Frase, R ^a   Pirsch, P ^a  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

MOTION PICTURE EXPERTS GROUP STANDARDS; SIGNAL PROCESSING; TEXTURES; THREE DIMENSIONAL; THREE DIMENSIONAL COMPUTER GRAPHICS;

CO-PROCESSOR ARCHITECTURE; CONFLICT-FREE ACCESS; MULTIMEDIA APPLICATIONS; PROCESSING RESOURCES; PROCESSOR ARCHITECTURES; PROGRAMMABLE ARCHITECTURES; SHADING ALGORITHMS; VIRTUAL ADDRESS SPACE;

COMPUTER ARCHITECTURE;

EID: 0031619417     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASSP.1998.678195     Document Type: Conference Paper

References (13)

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2. ISO/TEC 13818-2 "Generic coding of moving pictures and associated audio". (MPEG-2), Part2: Video, November 1993.
3. ISO/IEC JTC/SC29/WG11 "MPEG-4 video verification model V8.0". MPEG96/N1796 July 1997.
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10. Glaskowski, P. N. "3D Chips Break Megatriangle Barrier". Microprocessor Report, Vol. 11, No. 7, pp. 16-21, 1997.
11. Kneip, J., Berekovic, M., Wittenburg, J. P., Hinrichs, W., Pirsch, P. "An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor". Journal of VLSI Signal Processing 16, Vol. 11, No. l,pp. 31-40, May 1997.
12. Volkers, H. "Ein Beitrag zu Speicherarchitekturen programmierbarer Multiprozessoren der Bildverarbeitung". PhD thesis, VDI Fortschrittsberichte, Reihe 9, Nr. 211, VDI Verlag 1992.
13. Kneip, J., "Objektorientierte Cache-Speicher fur programmierbare monolithische Mutiprozessoren in der digitalen Bildverarbeitung". PhD thesis, University of Hannover, 1997.