-
5
-
-
3042934262
-
-
ISO/IEC JTC1/SC29/WGII, MPEG96/N1380, October
-
"MPEG-4 video verification model V4.0", ISO/IEC JTC1/SC29/WGII, MPEG96/N1380, October 1996
-
(1996)
MPEG-4 Video Verification Model V4.0
-
-
-
6
-
-
0347409986
-
-
ISO/IEC JTCI/SC29/WG11, MPEG96/N1395, October
-
"MPE-4 requirements version 1.1", ISO/IEC JTCI/SC29/WG11, MPEG96/N1395, October 1996
-
(1996)
MPE-4 Requirements Version 1.1
-
-
-
8
-
-
0029244586
-
VLSI architectures for video compression -a survey
-
February
-
P. Pirsch, N. Demassieux, W. Gehrke, "VLSI Architectures for Video Compression -A Survey", Proceedings of the IEEE, Vol. 83, No. 2, pp. 220-246, February 1995
-
(1995)
Proceedings of the IEEE
, vol.83
, Issue.2
, pp. 220-246
-
-
Pirsch, P.1
Demassieux, N.2
Gehrke, W.3
-
9
-
-
85076365687
-
LSI delivers mpeg decoder for digital tv
-
May 10
-
Gwennap, L. "LSI Delivers MPEG Decoder for Digital TV", Microprocessor Report, May 10, 1993
-
(1993)
Microprocessor Report
-
-
Gwennap, L.1
-
10
-
-
85076373021
-
MPEG choices for pcs abound
-
Turley, J. L. "MPEG Choices for PCs Abound", Microprocessor Report, Vol. 9, No. 10
-
Microprocessor Report
, vol.9
, Issue.10
-
-
Turley, J.L.1
-
11
-
-
0030130159
-
Two-chip mpeg-2 video encoder
-
April
-
Otsu, K., Nakagawa, R, Sato, Y., "Two-Chip MPEG-2 Video Encoder", IEEE Micro, April 1996
-
(1996)
IEEE Micro
-
-
Otsu, K.1
Nakagawa, R.2
Sato, Y.3
-
12
-
-
0003821186
-
-
"Programmer's Reference Manual", Intel Corporation
-
Pentium Pro Family Developer's Manual. Vol. 2: "Programmer's Reference Manual", Intel Corporation
-
Pentium Pro Family Developer's Manual
, vol.2
-
-
-
14
-
-
0030400487
-
Real-time software mpeg-1 video decoder design
-
Nadehara, K., Stolberg, H. J., Ikekawa, E. M., Kuroda, I., "Real-Time Software MPEG-1 Video Decoder Design", VLSI Signal Processing IX, IEEE, pp. 438-447, 1996
-
(1996)
VLSI Signal Processing IX, IEEE
, pp. 438-447
-
-
Nadehara, K.1
Stolberg, H.J.2
Ikekawa, E.M.3
Kuroda, I.4
-
15
-
-
0029695448
-
A monolithic low power video signal processor for multimedia applications
-
Herrmann, K., Gaedke, K., Jeschke, H., Pirsch, P., "A Monolithic Low Power Video Signal Processor For Multimedia Applications", IEEE international conference on consumer electronics, pp. 176-177, 1996
-
(1996)
IEEE International Conference on Consumer Electronics
, pp. 176-177
-
-
Herrmann, K.1
Gaedke, K.2
Jeschke, H.3
Pirsch, P.4
-
17
-
-
0028747398
-
A RSIC core for a monolithic video signal processor
-
Rabaey, J. et al., Eds., October, IEEE, New York, NY
-
Herrmann, K., Seifert, M., Gaedke, K., Jeschke, H., Pirsch, P., "A RSIC Core for a Monolithic Video Signal Processor", in Rabaey, J. et al., Eds., Workshop for VLSI Signal Processing, October 1994, pp. 368-377, IEEE, New York, NY, 1994
-
(1994)
Workshop for VLSI Signal Processing
, pp. 368-377
-
-
Herrmann, K.1
Seifert, M.2
Gaedke, K.3
Jeschke, H.4
Pirsch, P.5
-
19
-
-
0028573154
-
A data path array with shared memory as a core of a high performance dsp
-
Aug.
-
Kneip, J., Ronner, K., Pirsch, K.: "A Data Path Array with Shared Memory as a Core of a High Performance DSP", Proc. Int. Conference on Application Specific Array Processors, pp. 271-282, Aug. 1994
-
(1994)
Proc. Int. Conference on Application Specific Array Processors
, pp. 271-282
-
-
Kneip, J.1
Ronner, K.2
Pirsch, K.3
-
20
-
-
33646916355
-
IBM extends dsp performance with mfast
-
Dec. 4
-
Epstein, D., "IBM Extends DSP Performance with Mfast", Microprocessor Report, Vol. 9 No. 16, Dec. 4, 1995
-
(1995)
Microprocessor Report
, vol.9
, Issue.16
-
-
Epstein, D.1
-
21
-
-
0029389014
-
Associative controlling of monolithic parallel processor architectures
-
October
-
Gehrke, W., Gaedke, K., "Associative Controlling of monolithic parallel processor architectures", IEEE Trans. Circuits Syst. Video Technoi, vol. 5, No. 5, pp. 453-464, October 1995
-
(1995)
IEEE Trans. Circuits Syst. Video Technoi
, vol.5
, Issue.5
, pp. 453-464
-
-
Gehrke, W.1
Gaedke, K.2
-
22
-
-
85076375489
-
Assoziatives controlling von programmierbaren parallelprozessoren fur die videosignalverarbeitung
-
Reihe 10 Nr. 430, VDI-Verlag Dusseldorf, in German
-
Gehrke, W. "Assoziatives Controlling von programmierbaren Parallelprozessoren fur die Videosignalverarbeitung", VDI Fortschrittsberichte, Reihe 10 Nr. 430, VDI-Verlag Dusseldorf, 1996, (in German)
-
(1996)
VDI Fortschrittsberichte
-
-
Gehrke, W.1
-
23
-
-
84940113317
-
A parallel architecture for object-based video signal processing
-
8-14 Feb, San Jose, CA
-
Hilgenstock, J., Herrmann, K., Pirsch, P., "A Parallel Architecture for Object-based Video Signal Processing", to be published at Multimedia Hardware Architecture 1997, part of SPIE's Electronic imaging'97, 8-14 Feb. 1997, San Jose, CA.
-
(1997)
Multimedia Hardware Architecture 1997, Part of SPIE's Electronic Imaging'97
-
-
Hilgenstock, J.1
Herrmann, K.2
Pirsch, P.3
-
24
-
-
0020632876
-
Very long instruction word architectures and the eli-512
-
ACM SIGARCH, June
-
Fisher, J. A., "Very Long Instruction Word Architectures and the ELI-512", Proc. of the 10th Symposium on Computer Architecture, ACM SIGARCH, pp. 140-150, June 1983
-
(1983)
Proc. Of the 10th Symposium on Computer Architecture
, pp. 140-150
-
-
Fisher, J.A.1
-
25
-
-
0019596071
-
Trace scheduling: A technique for global microcode compaction
-
July
-
Fischer, J. A., "Trace Scheduling: A technique for Global Microcode Compaction", IEEE Trans, on Computer, vol. C-30, No 7, pp. 478-490, July 1981
-
(1981)
IEEE Trans, on Computer
, vol.C-30
, Issue.7
, pp. 478-490
-
-
Fischer, J.A.1
-
26
-
-
0028092560
-
A study of the number of memory ports in multiple instruction issue machines
-
December
-
Moon, S. M., Ebcioglu, K., "A Study of the number of memory ports in Multiple Instruction Issue Machines", 26th Annual Int. Symp. on Micro-Architecture, pp. 49-58, December 1993
-
(1993)
26th Annual Int. Symp. On Micro-Architecture
, pp. 49-58
-
-
Moon, S.M.1
Ebcioglu, K.2
-
27
-
-
85076361302
-
-
ENST, contribution to deliverable D30 of European ACTS Project No.: AC 105, Ecole Nationale Superieur des Telecommunications
-
ENST, "Microprocessor Architectures for MPEG4", contribution to deliverable D30 of European ACTS Project No.: AC 105, Ecole Nationale Superieur des Telecommunications
-
Microprocessor Architectures for MPEG4
-
-
-
28
-
-
85076360355
-
Multimedia instruction set extensions for a sixth-generation x86 processor
-
August
-
Maher, R. "Multimedia Instruction Set Extensions for a Sixth-Generation x86 Processor", Proc. HOT CHIPS VIII conference, pp. 163-170, August 1996
-
(1996)
Proc. HOT CHIPS VIII Conference
, pp. 163-170
-
-
Maher, R.1
-
29
-
-
0010232296
-
The trimedia tm-1 pci vliw media processor
-
August
-
Slavenburg, G., Rathnam, S., Dijkstra, H., "The Trimedia TM-1 PCI VLIW Media Processor", Proc. HOT CHIPS VIII conference, pp. 171-177, August 1996
-
(1996)
Proc. HOT CHIPS VIII Conference
, pp. 171-177
-
-
Slavenburg, G.1
Rathnam, S.2
Dijkstra, H.3
-
31
-
-
0029736455
-
The mpact media processor redefines the multimedia pc
-
IEEE CS Press
-
Foley, P., "The Mpact Media Processor Redefines the Multimedia PC", Proc. COMPCON, IEEE CS Press, pp. 311-318, 1996
-
(1996)
Proc. COMPCON
, pp. 311-318
-
-
Foley, P.1
-
33
-
-
5644280637
-
Microprocessors head toward mp on a chip
-
May 9
-
Gwennap, L., "Microprocessors Head Toward MP on a Chip", Microprocessor Report, Vol. 8, No. 6, May 9, 1994
-
(1994)
Microprocessor Report
, vol.8
, Issue.6
-
-
Gwennap, L.1
-
35
-
-
85076349813
-
MicroUnity lifts veil on media processor
-
October 23
-
Slater, M., "MicroUnity Lifts Veil on Media Processor", Microprocessor Report, Vol. 9, No. 14, October 23, 1995
-
(1995)
Microprocessor Report
, vol.9
, Issue.14
-
-
Slater, M.1
-
36
-
-
0010236943
-
Trade-off considerations and performance of intel's mmx technology
-
August
-
Weiser, U, "Trade-off Considerations and Performance of Intel's MMX Technology", Proc. HOT CHIPS VIII conference, pp. 147-161, August 1996
-
(1996)
Proc. HOT CHIPS VIII Conference
, pp. 147-161
-
-
Weiser, U.1
-
38
-
-
0342864777
-
A VLIW processor for multimedia applications
-
August
-
Holmann, E., Yamada, A., Yoshida, T., Shimazu, Y., "A VLIW Processor for Multimedia Applications", Proc. HOT CHIPS VIII conference, pp. 193-202, August 1996
-
(1996)
Proc. HOT CHIPS VIII Conference
, pp. 193-202
-
-
Holmann, E.1
Yamada, A.2
Yoshida, T.3
Shimazu, Y.4
-
39
-
-
0002449750
-
Subword parallelism with max-2
-
Aug.
-
Lee, R., "Subword Parallelism with MAX-2", IEEE Micro, Vol. 16, No. 4, pp. 51-59, Aug. 1996
-
(1996)
IEEE Micro
, vol.16
, Issue.4
, pp. 51-59
-
-
Lee, R.1
-
40
-
-
0030379048
-
Real-time mpeg-2 software decoding with a dual issue risc processor
-
Holmann, E., Yamada, A., Yoshida, T., Uramato, S., "Real-Time MPEG-2 Software Decoding with a dual issue RISC Processor", VLSI Signal Processing IX, IEEE, 1996, pp. 105-114
-
(1996)
VLSI Signal Processing IX
, pp. 105-114
-
-
Holmann, E.1
Yamada, A.2
Yoshida, T.3
Uramato, S.4
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