Memory efficient ATPG for path delay faults

Proceedings of the Asian Test Symposium

Volumn , Issue , 1997, Pages 326-331

  Long, Wangning ^a   Li, Zhongcheng ^a   Yang, Shiyuan ^a   Min, Yinghua ^a  

^a INSTITUTE OF GEOLOGY AND GEOPHYSICS   (China)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATED TEST PATTERN GENERATOR (ATPG); PATH DELAY FAULTS;

COMBINATORIAL CIRCUITS; LOGIC GATES;

INTEGRATED CIRCUIT TESTING;

EID: 0031358005     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

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