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Volumn , Issue , 1996, Pages 423-432
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Identification and test generation for primitive faults
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMBINATORIAL CIRCUITS;
ELECTRIC FAULT CURRENTS;
ELECTRIC NETWORK ANALYSIS;
BENCHMARK CIRCUITS;
MULTIPLE PATH DELAY FAULTS;
PRIMITIVE FAULTS;
INTEGRATED CIRCUIT TESTING;
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EID: 0030402726
PISSN: 10893539
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (14)
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References (15)
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