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Volumn 32, Issue 11, 1997, Pages 1766-1774

A 1-V programmable DSP for wireless communications

(19)  Lee, Wai a,b,f,g,h,i,j   Landman, Paul E a,b,i,k,l   Barton, Brock b,f,i,m,n,o   Abiko, Shigeshi c,p   Takahashi, Hiroshi a,b,c,i,q,r   Mizuno, Hiroyuki c,s   Muramatsu, Shigetoshi c,t   Tashiro, Kenichi c   Fusumada, Masahiro c   Pham, Luat b   Boutaud, Frederic a,d,e   Ego, Emmanuel d   Gallo, Girolamo b   Tran, Hiep b   Lemonds, Carl b   Shih, Albert b   Nandakumar, Mahalingam b   Eklund, Robert H a,b   Chen, Ih Chin a,b  


Author keywords

CMOS digital integrated circuits; Computer architecture; Flip flops; Integrated circuit design; Low power circuits; Low power CMOS; Phase locked loops; Semiconductor memories; Viterbi decoding; Wireless communications

Indexed keywords

CELLULAR TELEPHONE SYSTEMS; CMOS INTEGRATED CIRCUITS; CONSUMER ELECTRONICS; DECODING; ELECTRIC POWER SUPPLIES TO APPARATUS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; PHASE LOCKED LOOPS; RADIO COMMUNICATION; SEMICONDUCTOR STORAGE;

EID: 0031274865     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.641699     Document Type: Article
Times cited : (35)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.