LOCSTEP: A logic-simulation-based test generation procedure

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 5, 1997, Pages 544-554

  Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a IA United States   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER SIMULATION; INTEGRATED CIRCUIT TESTING; RANDOM PROCESSES;

LOGIC SIMULATION BASED TEST GENERATION PROCEDURE (LOCSTEP);

SEQUENTIAL CIRCUITS;

EID: 0031140532     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.631218     Document Type: Article

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