Erratum: Contribution of polished surface waviness to final soi thickness uniformity of bonded wafers through pace process

IEICE Transactions on Electronics

Volumn E80-C, Issue 3, 1997, Pages 370-377

  Mitanii, Kiyoshi ^a  

^a SHIN ETSU CHEMICAL CO LTD   (Japan)

Author keywords

PACE; Polishing; PSD; Soi thickness uniformity; Surface waviness

Indexed keywords

CHARGE COUPLED DEVICES; ELECTRIC VARIABLES MEASUREMENT; ELECTRODES; ETCHING; MORPHOLOGY; PLASMA APPLICATIONS; POLISHING; SILICON WAFERS; SURFACES;

COMPUTER CONTROLLED AUTOMATIC SYSTEM; PLASMA ASSISTED CHEMICAL ETCHING; SURFACE WAVINESS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0031095707     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Erratum

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