Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories

IEEE Journal of Solid-State Circuits

Volumn 31, Issue 11, 1996, Pages 1590-1599

  Kawahara, Takayuki ^a,b,c,d   Kobayashi, Takashi ^b,e,f   Jyouno, Yusuke ^b,g   Saeki, Syun Ichi ^b,d,h   Miyamoto, Naoki ^b,i   Adachi, Tetsuo ^b,j,k   Kato, Masataka ^a,b,l   Sato, Akihiko ^b,m   Yugami, Jiro ^a,b   Kume, Hitoshi ^a,b   Kimura, Katsutaka ^a,b  

^a IEEE

^b HITACHI LTD   (Japan)

^c KYUSHU UNIVERSITY   (Japan)

^d Info Commun E

^e TOHOKU UNIVERSITY   (Japan)

^f JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^g TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^h TOKAI UNIVERSITY   (Japan)

ⁱ NIHON UNIVERSITY   (Japan)

^j Ogata Technical High School

^k Hitachi Keihin Technical College

^l WASEDA UNIVERSITY   (Japan)

^m KEIO UNIVERSITY   (Japan)

more..

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; DATA TRANSFER; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; LOGIC CIRCUITS;

BIT LINE CLAMPED SENSING MULTIPLEX; CIRCUIT TECHNOLOGIES; FLASH MEMORY CELLS; VOLTAGE GENERATOR;

SEMICONDUCTOR STORAGE;

EID: 0030289281     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/jssc.1996.542303     Document Type: Article

References (14)

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