Novel Technique for SiO2 Formed by Liquid-Phase Deposition for Low-Temperature Processed Polysilicon TFT

IEEE Electron Device Letters

Volumn 14, Issue 8, 1993, Pages 403-405

  Yeh, Ching Fa ^a   Lin, Shyue Shyh ^a   Chen, Chun Lin ^a   Yang, Yu Chi ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC PROPERTIES; FABRICATION; THIN FILM DEVICES; TRANSISTORS;

LIQUID-PHASE DEPOSITION (LPD); LOW-TEMPERATURE PROCESSED POLYSILICON TFT; P-ETCH RATE; THIN FILM TRANSISTORS (TFTS);

SEMICONDUCTING SILICON COMPOUNDS;

EID: 0027642195     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.225593     Document Type: Article

References (5)

1. H. Ohshima and S. Morozumi, “Future trends for TFT integrated circuits on glass substrates,” in IEDM Tech Dig., 1989, pp. 157–160.
2. T. Homma, T. Katoh, Y. Yamada, I. Shimizu, and Y. Marao, “A new interlayer formation technology for completely planarized multilevel interconnection by using LPD,” in Proc. 1990 Symp. VLSI Technology, pp. 3–4.
3. A. Mimura, T. Suzuki, N. Konishi, T. Suzuki, and K. Miyata, “Low-temperature polysilicon TFT with two-layer gate insulator using photo-CVD and APCVD SiO 2,” IEEE Electron Device Lett., vol. 9, pp. 290–292, 1988.
4. A. Chiang et al., “Polysilicon thin film transistor material and device technologies,” in Extended Abstr. 1991 Conf. Solid State Devices and Materials, pp. 586–588.
5. C. F. Yeh, C. L. Chen, P. C. Huang, and S. S. Lin, “Growth of SiO 2 prepared by liquid phase deposition,” in Proc. 1992 Annual Conf. Chinese Soc. Mater. Sci., pp. 246–249.