A new interlayer formation technology for completely planarized multilevel interconnection by using LPD

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1990, Pages 3-4

  Homma, T ^a   Katoh, T ^a   Yamada, Y ^a   Shimizu, J ^a   Murao, Y ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH DENSITY; HOLE FORMATION; INTER-LAYER DIELECTRICS; INTERLAYER FORMATION; LIQUID PHASE DEPOSITIONS (LPD); LOW TEMPERATURES; LPD-SIO; MULTILEVEL INTERCONNECTION; PLANARIZATION; SELECTIVE DEPOSITION; TECHNOLOGY USE;

LOGIC DEVICES; SEMICONDUCTING SILICON COMPOUNDS;

TECHNOLOGY; INTEGRATED CIRCUITS, VLSI;

DIGEST OF PAPER; LIQUID PHASE DEPOSITION; MULTILEVEL INTERCONNECTION;

EID: 0025627399     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.1990.110979     Document Type: Conference Paper

References (2)

1. H. Nagayama, H. Hondaand H. Kawahara, J . of Electrochem. Soc., p. 2014, 1988.
2. T. Goda, H. Nagayama, A. Hishinuma and H . Kawahara, Mat. Res. Soc. Symp. Proc. vol. 5, p. 283, 1988.