Increase of gate capacitance in DMOST

IEEE Transactions on Electron Devices

Volumn 25, Issue 12, 1978, Pages 1388-1394

  Stikvoort, Eduard F ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC MEASUREMENTS - CAPACITANCE; SEMICONDUCTOR DEVICES, MIS;

TRANSISTORS;

CAPACITANCE METER; SEMICONDUCTOR;

EID: 0018195506     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1978.19360     Document Type: Article

References (7)

1. H. J. Sigg, G. D. Vendelin, T. P. Cauge, and K. Kocsis, “DMOST transistor for microwave applications,” IEEE Trans. Electron Devices, vol. ED-19, pp. 45–53, Jan. 1972.
2. H. C. Lin and W. N. Jones, “Computer analysis of the double diffused MOS transistor for integrated circuits,” IEEE Trans. Electron Devices, vol. ED-20, pp. 275–283, Mar. 1973.
3. J. W. Slotboom, “Computer aided two dimensional analysis of bipolar transistors,” IEEE Trans. Electron Devices, vol. ED-20, pp. 669–679, Aug. 1973.
4. D. Vandorpe, J. Borel, G. Merckel, and P. Saintot, “An accurate two-dimensional numerical analysis of the MOS transistor,” Solid-State Electron., pp. 547–557, May 1972.
5. D. P. Kennedy and R. R. O’Brien, “Analysis of the impurity atom distribution near the diffusion mask edge for a planar P-N junc-tion,” IBM J., pp. 179–186, May 1965.
6. T. J. Rodgers, S. Asai, M. D. Pocha, R. W. Dutton, and J. D. Meindl, “An experimental and theoretical analysis of double-diffused MOS transistors,” IEEE J. Solid State Circuits, vol. SC-10, no. 5, pp. 322-331,1975.
7. G. W. Taylor, “C. V. characteristics of ion implanted depletion IGFETs and buried layer CCD’s,” Solid-State Electron., pp. 495–503, June 1976.