Global interconnect design for high speed ULSI and system-on-package

Proceedings - 12th Annual IEEE International ASIC/SOC Conference

Volumn , Issue , 1999, Pages 251-256

  Zheng, Li Rong ^a   Li, Bingxin ^a   Tenhunen, Hannu ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUSBARS; DESIGN; DISTRIBUTED COMPUTER SYSTEMS; INTEGRATED CIRCUIT DESIGN; SYSTEM-ON-CHIP; SYSTEM-ON-PACKAGE; ULSI CIRCUITS;

ATTRACTIVE SYSTEMS; DEEP SUB-MICRON TECHNOLOGY; ELECTRICAL PERFORMANCE; GLOBAL INTERCONNECTS; INTERCONNECT DELAY; INTERCONNECT MODELING; OFF-CHIP INTERCONNECTS; SIGNAL INTEGRITY;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 0008389652     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.1999.806514     Document Type: Conference Paper

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