메뉴 건너뛰기




Volumn 19, Issue 4, 2000, Pages 413-424

Automated synthesis of current-memory cells

Author keywords

Cad, design automation, knowledge base, optimization, mixed signal, switched current

Indexed keywords


EID: 0008195128     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.838991     Document Type: Article
Times cited : (19)

References (20)
  • 3
  • 4
    • 0030195864 scopus 로고    scopus 로고
    • Automated design of switched-current filters, IEEEJ
    • vol. 31, pp. 898-907, July 1996.
    • J. B. Hughes et al., "Automated design of switched-current filters," IEEEJ. Solid-State Circuits, vol. 31, pp. 898-907, July 1996.
    • Solid-State Circuits
    • Hughes, J.B.1
  • 5
    • 0031191935 scopus 로고    scopus 로고
    • Design techniques for high resolution current-mode sigma-delta modulators
    • vol. 32, pp. 953-958, July 1997.
    • N. Moeneclaey and A. Kaiser, "Design techniques for high resolution current-mode sigma-delta modulators," IEEE J. Solid-State Circuits, vol. 32, pp. 953-958, July 1997.
    • IEEE J. Solid-State Circuits
    • Moeneclaey, N.1    Kaiser, A.2
  • 6
    • 0029252104 scopus 로고    scopus 로고
    • A two-channel 16/18b audio AD/DA including filter function with 60/40 mW power consumption at 2.7V
    • 95 Dig. Tech. Papers, Feb. 1995, pp. 208-209.
    • P. van Gog, B. Kup, and R. van Osch, "A two-channel 16/18b audio AD/DA including filter function with 60/40 mW power consumption at 2.7V," in ISSCC'95 Dig. Tech. Papers, Feb. 1995, pp. 208-209.
    • ISSCC'
    • Van Gog, P.1    Kup, B.2    Van Osch, R.3
  • 7
    • 0025562754 scopus 로고    scopus 로고
    • CMOS switched-current ladder filters
    • vol. 25, no. 6, pp. 1360-1367, Dec. 1990.
    • T. S. Fiez and D. J. Allstot, "CMOS switched-current ladder filters," IEEEJ. Solid-State Circuits, vol. 25, no. 6, pp. 1360-1367, Dec. 1990.
    • IEEEJ. Solid-State Circuits
    • Fiez, T.S.1    Allstot, D.J.2
  • 9
    • 84893814932 scopus 로고    scopus 로고
    • An analog beam-forming circuit using switched-current delay lines
    • 98, Sept. 1998, pp. 300-303.
    • B. Stefanelli, I. O'Connor, L. Quiquerez, A. Kaiser, and D. Billet, "An analog beam-forming circuit using switched-current delay lines," in Proc. ESSCIRC'98, Sept. 1998, pp. 300-303.
    • Proc. ESSCIRC'
    • Stefanelli, B.1    O'Connor, I.2    Quiquerez, L.3    Kaiser, A.4    Billet, D.5
  • 10
    • 0024904709 scopus 로고    scopus 로고
    • ISAAC: A symbolic simulator for analog integrated circuits
    • vol. 24, pp. 1587-1597, Dec. 1989.
    • G. Gielen, H. Walscharts, and W. Sansen, "ISAAC: A symbolic simulator for analog integrated circuits," IEEE J. Solid-State Circuits, vol. 24, pp. 1587-1597, Dec. 1989.
    • IEEE J. Solid-State Circuits
    • Gielen, G.1    Walscharts, H.2    Sansen, W.3
  • 11
    • 0006993498 scopus 로고    scopus 로고
    • 9, Philips Research Laboratories Eindhoven, Unclassified Rep. NL-UR 003/94, 1995.
    • R. Velghe, D. Klaassen, and F. Klaassen, "MOS model 9," Philips Research Laboratories Eindhoven, Unclassified Rep. NL-UR 003/94, 1995.
    • MOS Model
    • Velghe, R.1    Klaassen, D.2    Klaassen, F.3
  • 12
    • 33747507199 scopus 로고    scopus 로고
    • 3v3 Manual, Dept. Elect. Eng. Comput. Sci., Univ. California, Berkeley, 1996.
    • BSIM3v3 Manual, Dept. Elect. Eng. Comput. Sci., Univ. California, Berkeley, 1996.
    • BSIM
  • 15
    • 0025405103 scopus 로고    scopus 로고
    • Regulated cascode switched-current memory cell
    • vol. 26, no. 5, pp. 303-305, Mar. 1990.
    • C. Toumazou, J. B. Hughes, and D. M. Pattullo, "Regulated cascode switched-current memory cell," Electron. Lett., vol. 26, no. 5, pp. 303-305, Mar. 1990.
    • Electron. Lett.
    • Toumazou, C.1    Hughes, J.B.2    Pattullo, D.M.3
  • 16
    • 0027909822 scopus 로고    scopus 로고
    • S2I: A switched-current technique for high performance
    • vol. 29, no. 16, pp. 1400-1401, Aug. 1993.
    • J. B. Hughes and K. W. Moulding, "S2I: A switched-current technique for high performance," Electron. Lett., vol. 29, no. 16, pp. 1400-1401, Aug. 1993.
    • Electron. Lett.
    • Hughes, J.B.1    Moulding, K.W.2
  • 17
    • 0028599632 scopus 로고    scopus 로고
    • Accurate modeling of the nonlinear settling behavior of current-memory circuits
    • 94, vol. 1, June 1994, pp. 339-342.
    • N. Moeneclaey and A. Kaiser, "Accurate modeling of the nonlinear settling behavior of current-memory circuits," in Proc. ISCAS'94, vol. 1, June 1994, pp. 339-342.
    • Proc. ISCAS'
    • Moeneclaey, N.1    Kaiser, A.2
  • 19
    • 0028379015 scopus 로고    scopus 로고
    • Predicting harmonic distortion in switched-current memory circuits
    • vol. 41, pp. 73-86, Feb. 1994.
    • P. J. Crawley and G. W. Roberts, "Predicting harmonic distortion in switched-current memory circuits," IEEE Trans. Circuits Syst. II, vol. 41, pp. 73-86, Feb. 1994.
    • IEEE Trans. Circuits Syst. II
    • Crawley, P.J.1    Roberts, G.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.