Free-space parallel multichip interconnection system

Applied Optics

Volumn 39, Issue 20, 2000, Pages 3516-3524

  Zheng, Xuezhe ^a   Marchand, Philippe J ^a   Huang, Dawei ^a   Esener, Sadik C ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAYS; ELECTRONICS PACKAGING; LASERS; MICROPROCESSOR CHIPS;

FREE-SPACE OPTICS;

MULTICHIP MODULES;

EID: 0001634098     PISSN: 1559128X     EISSN: 21553165     Source Type: Journal    
DOI: 10.1364/AO.39.003516     Document Type: Article

References (23)

1. A. V. Krishnamoorthy and D. A. B. Miller, “Firehose architectures for free-space optically interconnected VLSI circuits,” J. Parallel Distrib. Comput. 41, 109-114 (1997).
2. P. J. Marchand, A. V. Krishnamoorthy, G. I. Yayla, S. C. Es-ener, and U. Efron, “Optically augmented 3-D computer: system technology and architecture.” J. Parallel Distrib. Comput., Special Issue on Optical Interconnects 41, 20-35 (1997).
3. G. A. Betzos and P. A. Mitkas, “Performance evaluation of massively parallel processing architectures with threedimensional optical interconnections,” Appl. Opt. 37, 315-325 (1998).
4. J. W. Goodman, F. J. Leonberger, S. C. Kung, and R. A. Athale, “Optical Interconnections for VLSI systems,” Proc. IEEE 72, 850-866 (1984).
5. L. A Bergman, W. H. Wu, A. R. Johnston, R. Nixon, S. C. Esener, C. C. Guest, P. Yu, T. J. Drabik, M. Feldman, and S. H. Lee, “Holographic optical interconnects in VLSI,” Opt. Eng. 25, 1109-1118 (1986).
6. W. H. Wu, L. A Bergman, A. R. Johnston, C. C. Guest, S.C Esener, P. K. L. Yu, M. R. Feldman, and S. H. Lee, “Implementation of optical interconnections for VLSI,” IEEE Trans. Electron. Devices 34, 706-714 (1987).
7. R. K. Kostuk, J. W. Goodman, and L. Hesselink, “Optical imaging applied to microelectric chip-to-chip interconnections,” Appl. Opt. 24, 2851-2858 (1985).
8. D. A. B. Miller, “Physical reasons for optical interconnection,” Intl. J. Optoelectron. 11, 155-168 (1997).
9. A. V. Krishnamoorthy and D. A. B. Miller, “Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap,” IEEE J. Sel. Top. Quantum Optoelectron. 2, 55-76 (1996).
10. M. R. Feldman, S. C. Esener, C. C. Guest, and S. H. Lee, “Comparison between optical and electrical interconnects based on power and speed considerations,” Appl. Opt. 27, 1742-1751 (1988).
11. F. Kiamilev, P. J. Marchand, A. V. Krishnamoorthy, S. Esener, and S. H. Lee, “Performance comparison between optoelectronic and VLSI multistage interconnection networks,” IEEE J. Lightwave Technol. 9, 1674-1692 (1991).
12. A. V. Krishnamoorthy, P. Marchand, F. Kiamilev, K. S. Urquhart, and S. Esener, “Grain-size consideration for optoelectronic multistage interconnection network,” Appl. Opt. 31, 5480-5507 (1992).
13. G. Yayla, P. J. Marchand, and S. Esener, “Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies,” Appl. Opt. 37, 205-227 (1998).
14. R. A. Morgan, J. Bristow, M. Hibbs-Brenner, J. Nohava, S. Bounnak, T. Marta, J. Lehman, and Y. Liu, “Vertical cavity surface emitting lasers for spaceborne photonic interconnects,” in Photonics for Space Environments IV, E. W. Taylor, ed., Proc SPIE 2811, 232-242 (1996).
15. A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydzik, K. W. Goosen, J. D. Wynn, B. J. Tseng, J. A. Walker, J. E. Cunningham, and L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128-130 (1999).
16. F. B. McCormick, T. J. Cloonan A. L. Lentine, J. M. Sasian R. L. Morrison, M. G. Beckman, S. L. Walker, M. J. Wojcik, S. J. Hinterlong, R. J. Crisci, R. A. Novotny, and H. S. Hinton, “Five-stage free-space optical switching network with field-effect transistor self-electro-optic-effect-device smart-pixel arrays,” Appl. Opt., Special Issue on Optical Computing 33, 1601-1618 (1994).
17. A. L. Lentine, D. J. Reiley, R. A. Novotny, R. L. Morrison, J. M. Sasian M. G. Beckman, D. B. Buchhoz, S. J. Hinterlong, T. J. Cloonan G. W. Richards, and F. B. McCormick, “Asynchronous transfer mode distribution network by use of an optoelectronic VLSI switching chip,” Appl. Opt. 36, 1804-1814 (1997).
18. S. Patra, J. Ma, V. Ozguz, and S. H. Lee, “Alignment issues in packaging for free-space optical interconnects,” Opt. Eng. 33, 1561-1570 (1994).
19. D. Zaleta, S. Patra, V. Ozguz, J. Ma, and S. Lee, “Tolerancing of board-level-free-space optical interconnects,” Appl. Opt. 35, 1317-1327 (1996).
20. D. T. Neilson and E. Schenfeld, “Plastic modules for free-space optical interconnects,” Appl. Opt. 37, 2944-2951 (1998).
21. F. Quercioli, B. Tiribilli, A. Mannoni, and S. Acciai, “Optome-chanics with LEGO,” Appl. Opt. 37, 3408-3416 (1998).
22. X. Zheng, P. Marchand, D. Huang, O. Kibar, N. Ozkan, and S. Esener, “Optomechanical design and characterization of a printed-circuit-board-based free-space optical interconnect package,” Appl. Opt. 38, 5631-5640 (1999).
23. S. C. Esener and P. Marchand, “3D optoelectronic stacked processors: design and analysis,” in Optics in Computing ‘98, P. Chavel, D. Miller, and H. Thienpont, eds., Proc SPIE 3490, 541-545 (1998).