Line-to-Ground Capacitance Calculation for VLSI: A Comparison

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 7, Issue 2, 1988, Pages 295-298

  Barke, Erich ^a  

^a SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC MEASUREMENTS - CAPACITANCE; MATHEMATICAL TECHNIQUES - APPROXIMATION THEORY;

LINE-TO-GROUND CAPACITANCE; MEIJS/FOKKEMA APPROXIMATION; PARASITIC CAPACITANCE;

INTEGRATED CIRCUITS, VLSI;

EID: 0023963696     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.3160     Document Type: Article

References (11)

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2. J. Goerth, “Electrical features of linear IC's”, Valvo GmbH, Hamburg, 1977 (in German).
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11. W. Wilhelm, “Propagation delays of interconnect lines in large-scale integrated circuits”, Siemens Res. Develop. J., vol. 15, no. 2, pp. 60-63, 1986.