Multiple-valued signed-digit adder using negative differential-resistance devices

IEEE Transactions on Computers

Volumn 47, Issue 9, 1998, Pages 947-959

  González, Alejandro F ^a,b   Mazumder, Pinaki ^a,b  

^a UNIVERSITY OF MICHIGAN   (United States)

^b IEEE   (United States)

Author keywords

Multiple valued logic; Quantum electronic resonant tunneling circuits.xxx; Signed digit arithmetic

Indexed keywords

EID: 0001214186     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.713314     Document Type: Article

References (28)

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