Impact of ESD-induced soft drain junction damage on CMOS product lifetime

Microelectronics Reliability

Volumn 40, Issue 8-10, 2000, Pages 1619-1628

  Reiner, Joachim C ^a   Keller, Thomas ^a   Jäggi, Hans ^a   Mira, Silvio ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0000984198     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(00)00179-7     Document Type: Article

References (6)

1. Kuper-F; Luchies-JM; Bruines-J: "Suppression and origin of soft ESD failures in a submicron CMOS process", Journal-of-Electrostatics. vol.33, no.3; Oct. 1994; p.313-25
2. J.-M.Luchies, J. C. Reiner: "Properties of small leakage currents resulting from ESD stress and their latency aspects", 1995, p.217-222, Proceedings of the 6th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF)
3. Wada-T: "Study of the soft leakage current induced ESD on LDD transistor", Microelectronics-and-Reliability. vol.36, no. 11-12; Nov.-Dec. 1996; p.1707-10
4. ESD test standard of the Electrostatic Discharge Association (ESDA): ESD STM5.1-1998 Revised: Electrostatic Discharge Sensitivity Testing - Human Body Model
5. G. Notermans, P. de Jong, F. Kuper, "Pitfalls when correlating TLP, HBM and MM testing", 1998 EOS/ESD Syposium Proceedings, p. 170
6. A. Birolini, "Qualität und Zuverlässigkeit technischer Systeme", 2nd Edition, ISBN 3-540-50470-2, p. 195 Eq. 7.5