CMOS analog circuit design via geometric programming

Proceedings of the American Control Conference

Volumn 4, Issue , 2004, Pages 3266-3271

  Del Mar Hershenson, Maria ^a  

^a Barcelona Design Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MONOMIAL FUNCTIONS; OPTIMIZATION METHODS; POSYNOMIAL FUNCTIONS;

ANALOG TO DIGITAL CONVERSION; INTEGRATED CIRCUITS; LINEAR PROGRAMMING; MATHEMATICAL MODELS; OPTIMIZATION; PROBLEM SOLVING; TRANSISTORS; VECTORS;

CMOS INTEGRATED CIRCUITS;

EID: 8744267221     PISSN: 07431619     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ACC.2004.182788     Document Type: Conference Paper

References (11)

1. P. Gray. Analog ICs in the submicron era: trends and perspectives. In Proceedings IEEE International Electron Devices Meeting, pages 5-9, 1987.
2. S. Kariya. Where the jobs are. IEEE Spectrum, 40(1), January 2003.
3. S. Boyd and L. Vandenberghe. Convex Optimization. Cambridge University Press, 2003.
4. K. O. Kortanek, X. Xu, and Y. Ye. An infeasible interior-point algorithm for solving primal and dual geometric programs. Math Programming, 76:155-181, 1996.
5. M. Hershenson. Design of pipeline analog-to-digital couvertes via geometric programming. In Proceedings of the 2002 IEEE/ACM International Conference on Computer Aided Design, November 2002.
6. M. Hershenson, S. Boyd, and T. H. Lee. Optimal design of a CMOS op-amp via geometric programming. IEEE Transactions on Computer-Aided Design, 20:1-21, January 2001.
7. http://www-device.eecs.berkeley.edu/b~sim3.
8. W. Daems, C. Gielen, and W. Sansen. An efficient optimization-based technique to generate posynomial performance models for analog. In 39th Design Automation Conference, pages 431-436, 2002.
9. D.F. Wong and C.L. Liu. A new algorithm for floorplan design. In Design Automation Conference, pages 101-017, 1986.
10. B. Wooley and K. Vleugels. EE315 course notes. Stanford University, CA, April 2003.
11. D. M. Colleran, C. Portmann, A. Hassibi, C. Crusius, S. S. Mohan, S. Boyd, T. H. Lee, and M. Hershenson. Optimization of phase-locked loop circuits via geometric porgramming. September 2003.