Achieving 10Gbps line-rate key-value stores with FPGAs

5th USENIX Workshop on Hot Topics in Cloud Computing, HotCloud 2013

Volumn , Issue , 2013, Pages

  Blott, Michaela ^a   Karras, Kimon ^a   Liu, Ling ^a   Vissers, Kees ^a   Bär, Jeremia ^b   István, Zsolt ^b  

^a XILINX INC   (United States)

^b ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CLOUD COMPUTING; ELECTRIC POWER UTILIZATION; MEMORY ARCHITECTURE; MIDDLEWARE; NETWORK ARCHITECTURE;

DATA-FLOW ARCHITECTURES; HIGH POWER CONSUMPTION; KEY-VALUE STORES; LOWER-POWER CONSUMPTION; PERFORMANCE SCALABILITY; SINGLE-THREAD PERFORMANCE; TIGHT INTEGRATIONS; WEB INFRASTRUCTURE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 85084163962     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

1. ARVIND, AND NIKHIL, R. Executing a program on the mit tagged-token dataflow architecture. Computers, IEEE Transactions on 39, 3 (March 1990), 300–318.
2. ATIKOGLU, B., XU, Y., FRACHTENBERG, E., JIANG, S., AND PALECZNY, M. Workload analysis of a large-scale key-value store. SIGMETRICS Perform. Eval. Rev. 40, 1 (June 2012), 53–64.
3. BANDO, M., ARTAN, N., AND CHAO, H. Flashlook: 100-gbps hash-tuned route lookup architecture. In High Performance Switching and Routing, 2009. HPSR 2009. International Conference on (June 2009), pp. 1 –8.
4. BEREZECKI, M., FRACHTENBERG, E., PALECZNY, M., AND STEELE, K. Power and performance evaluation of memcached on the tilepro64 architecture. In Green Computing Conference and Workshops (IGCC), 2011 International (July 2011), pp. 1 – 8.
5. CHALAMALASETTI, S. R., LIM, K., WRIGHT, M., AUYOUNG, A., RANGANATHAN, P., AND MARGALA, M. An fpga memcached appliance. In Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (New York, NY, USA, 2013), FPGA’13, ACM, pp. 245–254.
6. CONG, J., LIU, B., NEUENDORFFER, S., NOGUERA, J., VISSERS, K., AND ZHANG, Z. High-level synthesis for fpgas: From prototyping to deployment. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on 30, 4 (April 2011), 473 –491.
7. FERDMAN, M., ADILEH, A., KOCBERBER, O., VOLOS, S., ALISAFAEE, M., JEVDJIC, D., KAYNAK, C., POPESCU, A. D., AILAMAKI, A., AND FALSAFI, B. Clearing the clouds: a study of emerging scale-out workloads on modern hardware. SIGARCH Comput. Archit. News 40, 1 (Mar. 2012), 37–48.
8. HETHERINGTON, T. H., ROGERS, T. G., HSU, L., O’CONNOR, M., AND AAMODT, T. M. Characterizing and evaluating a key-value store application on heterogeneous cpu-gpu systems. In Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software (Washington, DC, USA, 2012), ISPASS’12, IEEE Computer Society, pp. 88–98.
9. ISTVAN, Z. Hash Table for Large Key-Value Stores on FPGAs . Master’s thesis, ETH Zurich, Dept. of Computer Science, Systems Group, Switzerland, 2013.
10. JOSE, J., SUBRAMONI, H., LUO, M., ZHANG, M., HUANG, J., UR RAHMAN, M. W., ISLAM, N. S., OUYANG, X., WANG, H., SUR, S., AND PANDA, D. K. Memcached design on high performance rdma capable interconnects. 2012 41st International Conference on Parallel Processing 0 (2011), 743–752.
11. LANG, W., PATEL, J. M., AND SHANKAR, S. Wimpy node clusters: what about non-wimpy workloads? In DaMoN (2010), pp. 47–55.
12. MATTSON, R., GECSEI, J., SLUTZ, D., AND TRAIGER, I. Evaluation techniques for storage hierarchies. IBM Systems Journal 9, 2 (1970), 78 –117.
13. WIGGINS, A., AND LANGSTON, J. Enhancing the scalability of memcached. In Intel Software Network (2012).