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Volumn , Issue , 2003, Pages

An all-digital A/D converter for increased resolution with a 2 -delay-unit ‘7'7 TAD architecture using moving-average filtering

Author keywords

ADC; All digital; Moving average

Indexed keywords

DELAY CIRCUITS; LOW PASS FILTERS; SPURIOUS SIGNAL NOISE;

EID: 85084021195     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (14)

References (12)
  • 1
    • 0037248737 scopus 로고    scopus 로고
    • An all-digital analog-to-digital converter with 12-pV/LSB using moving-average filtering
    • Jan
    • T. Watanabe, T. Mizuno, Y. Makino, “An all-digital analog-to-digital converter with 12-pV/LSB using moving-average filtering,” IEEE Journal of Solid-State Circuits, vol. 38, no. 1, pp. 120-125, Jan. 2003.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , Issue.1 , pp. 120-125
    • Watanabe, T.1    Mizuno, T.2    Makino, Y.3
  • 3
    • 0036226765 scopus 로고    scopus 로고
    • A 33mW 14b 2.5Msample/s ΣΔ A D converter in 0.25mm digital CMOS
    • Feb
    • R. Reutemann, P. Balmelli, Q. Huang, “A 33mW 14b 2.5Msample/s ΣΔ A D converter in 0.25mm digital CMOS,” in ISSCC Dig. Tech. Papers, pp. 316-317, Feb. 2002.
    • (2002) ISSCC Dig. Tech. Papers , pp. 316-317
    • Reutemann, R.1    Balmelli, P.2    Huang, Q.3
  • 4
    • 0036224668 scopus 로고    scopus 로고
    • A 1.8V 14b ΣΔ A/D converter with 4MSamples/s conversion
    • Feb
    • R. Jiang, T. S. Fiez, “A 1.8V 14b ΣΔ A/D converter with 4MSamples/s conversion,” in ISSCC Dig. Tech. Papers, pp. 172-173, Feb. 2002.
    • (2002) ISSCC Dig. Tech. Papers , pp. 172-173
    • Jiang, R.1    Fiez, T.S.2
  • 5
    • 0029290334 scopus 로고
    • Overview of low-power ULSI circuit techniques
    • April
    • T. Kuroda, T. Sakurai, “Overview of low-power ULSI circuit techniques,” IEICE Trans. Electron., vol. E78-C, no. 4, April 1995, pp. 334-344.
    • (1995) IEICE Trans. Electron. , vol.E78-C , Issue.4 , pp. 334-344
    • Kuroda, T.1    Sakurai, T.2
  • 6
    • 0027814934 scopus 로고
    • A CMOS time-to-digital converter LSI with half-nanosecond resolution using a ring gate delay line
    • Dec
    • T. Watanabe, Y. Makino, Y. Ohtsuka, S. Akita, T. Hattori, “A CMOS time-to-digital converter LSI with half-nanosecond resolution using a ring gate delay line,” IEICE Trans. Electron., vol. E76-C, no. 12, pp. 1774-1779, Dec. 1993.
    • (1993) IEICE Trans. Electron. , vol.E76-C , Issue.12 , pp. 1774-1779
    • Watanabe, T.1    Makino, Y.2    Ohtsuka, Y.3    Akita, S.4    Hattori, T.5
  • 8
    • 0032050259 scopus 로고    scopus 로고
    • Development of a time-to-digital converter IC for laser radar
    • April
    • T. Watanabe, S. Agatsuma, H. Isomura, Y. Ohtsuka, S. Akita, T. Hattori, “Development of a time-to-digital converter IC for laser radar,” JSAE Review, vol. 19, no. 2, pp. 161-165, April 1998.
    • (1998) JSAE Review , vol.19 , Issue.2 , pp. 161-165
    • Watanabe, T.1    Agatsuma, S.2    Isomura, H.3    Ohtsuka, Y.4    Akita, S.5    Hattori, T.6
  • 9
    • 0037319509 scopus 로고    scopus 로고
    • An all-digital PLL for frequency multiplication by 4 to 1022 with 7-cycle lock time
    • Feb
    • T. Watanabe, S. Yamauchi, “An all-digital PLL for frequency multiplication by 4 to 1022 with 7-cycle lock time,” IEEE Journal of Solid-State Circuits, vol. 38, no. 2, pp. 198-204, Feb. 2003.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , Issue.2 , pp. 198-204
    • Watanabe, T.1    Yamauchi, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.