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Volumn , Issue , 2013, Pages 271-284

Understanding the robustness of SSDs under power fault

Author keywords

[No Author keywords available]

Indexed keywords

CRIME; DIGITAL STORAGE;

EID: 85061208594     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (89)

References (27)
  • 6
    • 27344441029 scopus 로고    scopus 로고
    • Algorithms and data structures for flash memories
    • Eran Gal and Sivan Toledo. Algorithms and data structures for flash memories. ACM Comput. Surv., 37(2):138-163, 2005.
    • (2005) ACM Comput. Surv. , vol.37 , Issue.2 , pp. 138-163
    • Gal, E.1    Toledo, S.2
  • 14
    • 70350332131 scopus 로고    scopus 로고
    • LAST: Locality-aware sector translation for NAND flash memory-based storage systems
    • October
    • Sungjin Lee, Dongkun Shin, Young-Jin Kim, and Jihong Kim. LAST: locality-aware sector translation for NAND flash memory-based storage systems. SIGOPS Oper. Syst. Rev., 42(6):36-42,October 2008.
    • (2008) SIGOPS Oper. Syst. Rev. , vol.42 , Issue.6 , pp. 36-42
    • Lee, S.1    Shin, D.2    Kim, Y.3    Kim, J.4
  • 21
    • 0026812659 scopus 로고
    • The design and implementation of a log-structured file system
    • Mendel Rosenblum and John K. Ousterhout. The design and implementation of a log-structured file system. ACM Trans. Comput. Syst., 10(1):26-52, 1992.
    • (1992) ACM Trans. Comput. Syst. , vol.10 , Issue.1 , pp. 26-52
    • Rosenblum, M.1    Ousterhout, J.K.2
  • 22
    • 57149135618 scopus 로고    scopus 로고
    • NAND flash memory and its role in storage architectures
    • November
    • Marco A. A. Sanvido, Frank R. Chu, Anand Kulkarni, and Robert Selinger. NAND Flash Memory and Its Role in Storage Architectures. In Procedings of the IEEE, pages 1864-1874, November 2008.
    • (2008) Procedings of the IEEE , pp. 1864-1874
    • Sanvido, M.A.A.1    Chu, F.R.2    Kulkarni, A.3    Selinger, R.4
  • 24
    • 0032140032 scopus 로고    scopus 로고
    • A multipage cell architecture for high-speed programming multilevel NAND flash memories
    • August
    • K. Takeuchi, T. Tanaka, and T. Tanzawa. A multipage cell architecture for high-speed programming multilevel NAND flash memories. In IEEE Journal of Solid-State Circuits, August 1998.
    • (1998) IEEE Journal of Solid-State Circuits
    • Takeuchi, K.1    Tanaka, T.2    Tanzawa, T.3
  • 25
    • 84994522958 scopus 로고    scopus 로고
    • Two flash technologies compared: NOR vs NAND
    • Arie Tal. Two flash technologies compared: NOR vs NAND. In White Paper of M-SYstems, 2002.
    • (2002) White Paper of M-SYstems
    • Tal, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.