Nonlinear dynamical systems utilizing pulse modulation signals and a CMOS chip generating arbitrary chaos

Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, MicroNeuro 1999

Volumn , Issue , 1999, Pages 254-260

  Morie, T ^a   Sakabayashi, S ^a   Nagata, M ^a   Iwata, A ^a  

^a HIROSHIMA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DYNAMICAL SYSTEMS; FUZZY INFERENCE; FUZZY LOGIC; MICROELECTRONICS; NONLINEAR DYNAMICAL SYSTEMS; PULSE MODULATION; PULSE WIDTH MODULATION; TRANSFER FUNCTIONS; VOLTAGE CONTROL;

ANALOG PROCESSING; ANALOG VOLTAGE; CONTINUOUS STATE; INVERSE FUNCTIONS; MODULATION SIGNALS; NONLINEAR TRANSFER FUNCTIONS; NONLINEAR WAVEFORM; VLSI IMPLEMENTATION;

MODULATION;

EID: 85027154685     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MN.1999.758872     Document Type: Conference Paper

References (10)

1. K. Aihara, T. Takabe, and M. Toyoda, \Chaotic Neu-ral Networks," Phys. Lett. A, vol. 144, pp. 333-340, 1990
2. D. L. Wang and D. Terman, \Locally Excita-tory Globally Inhibitory Oscillator Networks," IEEE Trans. Neural Networks, vol. 6, no. 1, pp. 283-286, 1995
3. T. Morie, S. Sakabayashi, M. Nagata, and A. Iwata, \Nonlinear Function Generators and Chaotic Sig-nal Generators Using a Pulse-Width Modulation Method," Electron. Lett., vol. 33, no. 16, pp. 1351-1352, 1997
4. T. Morie, S. Sakabayashi, H. Ando, M. Nagata, and A. Iwata, \Pulse Modulation Circuit Tech-niques for Nonlinear Dynamical Systems," in Proc. Int. Symp. on Nonlinear Theory and its Applica-tion (NOLTA'98), pp. 447-450, Crans-Montana, Sept. 1998
5. S. Sakabayashi, T. Morie, M. Nagata, and A. Iwata, \Nonlinear Function Generators and Chaotic Signal Generators Based on Pulse-Phase Modulation," in Proc. 5th Int. Conf. on Neural Information Processing (ICONIP'98), pp. 582-585, Kitakyushu, Oct. 1998
6. H. Ando, T. Morie, M. Nagata, and A. Iwata, \Oscillator Networks for Image Segmentation and their Circuits using Pulse Modulation Methods," in Proc. 5th Int. Conf. on Neural Information Processing (ICONIP'98), pp. 586-589, Kitakyushu, Oct. 1998
7. A. F. Murray and P. J. Edwards, \Enhanced MLP Performance and Fault Tolerance Resulting from Synaptic Weight Noise During Training," IEEE Trans. Neural Networks, vol. 5, no. 5, pp. 792-802, 1994
8. H. Eguchi, T. Furuta, H. Horiguchi, S. Oteki, and T. Kitaguchi, \Neural Network LSI Chip with On-chip Learning," in Proc. Int. Joint Conf. on Neural Networks, pp. 453-456, Seattle, July 1991
9. Y. Hirai and M. Yasunaga, \A PDM Digital Neu-ral Network System with 1,000 Neurons Fully In-terconnected via 1,000,000 6-bit Synapses," in Proc. ICONIP, pp. 1251-1256, 1996
10. A. Iwata and M. Nagata, \A Concept of Analog-Digital Merged Circuit Architecture for Future VLSI's," IEICE Trans. Fundamentals., vol. E79-A, no. 2, pp. 145-157, 1996