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Volumn 4, Issue 4, 2005, Pages 851-876

Analyzing Data Reuse for Cache Reconfiguration

Author keywords

Algorithms; cache locality; cache polymorphism; compilers; data reuse; Design; Embedded software; energy consumption; Measurement; Performance

Indexed keywords


EID: 85013366564     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/1113830.1113836     Document Type: Article
Times cited : (10)

References (24)
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    • Bacon, D. F., Graham, S. L., Sharp, O. J., 1994. Compiler transformations for high-performance computing.ACM Computing Surveys 26, 4, 345-420.
    • (1994) ACM Computing Surveys , vol.26 , Issue.4 , pp. 345-420
    • Bacon, D.F.1    Graham, S.L.2    Sharp, O.J.3
  • 4
    • 1542296867 scopus 로고    scopus 로고
    • Memory hierarchy extensions to simplescalar 3.0. Tech. Rep. TR99-25
    • The University of Texas at Austin, Austin, TX
    • Burger, D., Kagi, A., Hrishikesh, M. S., 2000. Memory hierarchy extensions to simplescalar 3.0. Tech. Rep. TR99-25, Department of Computer Sciences, The University of Texas at Austin, Austin, TX.
    • (2000) Department of Computer Sciences
    • Burger, D.1    Kagi, A.2    Hrishikesh, M.S.3
  • 5
    • 84925594908 scopus 로고    scopus 로고
    • Compiler analysis of cache interference and its applications to compiler optimizations
    • Dept. of Computer Engineering, University of Southern California, Los Angeles, CA
    • Chame, J., 1997. Compiler analysis of cache interference and its applications to compiler optimizations. Ph.D. thesis, Dept. of Computer Engineering, University of Southern California, Los Angeles, CA.
    • (1997) Ph.D. thesis
    • Chame, J.1
  • 7
    • 0001366267 scopus 로고
    • Strategies for cache and local memory management by global program transformation
    • 5 (Oct.
    • Gannon, D., Jalby, W., Gallivan, K., 1988. Strategies for cache and local memory management by global program transformation.Journal of Parallel and Distributed Computing 5, 5 (Oct.), 587-616.
    • (1988) Journal of Parallel and Distributed Computing , vol.5 , pp. 587-616
    • Gannon, D.1    Jalby, W.2    Gallivan, K.3
  • 16
    • 0003946111 scopus 로고    scopus 로고
    • An integrated cache timing and power model
    • Cacti 2.0 technical report, COMPAQ Western Research Lab
    • Reinman, G., Jouppi, N., 1999. An integrated cache timing and power model. Cacti 2.0 technical report, COMPAQ Western Research Lab.
    • (1999)
    • Reinman, G.1    Jouppi, N.2
  • 22


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.