A quad 3.125 Gb/s/channel transceiver with analog phase rotators

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages

  Zheng, Dong ^a   Jin, Xuecheng ^a   Cheung, Eugene ^a   Rana, Manoj ^a   Song, Ge ^a   Jiang, Yong ^a   Sutu, Yue Hong ^a   Wu, Bin ^a  

^a BitBlitz Communications   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 85013344083     PISSN: 01936530     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISSCC.2002.992943     Document Type: Article

References (2)

1. Fully-integrated SONET OC48 transceiver in Standard CMOS
2. 40 Gb/s ASIC switch design using low-jitter clock recovery