Fully-integrated SONET OC48 transceiver in standard CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 433, Issue , 2001, Pages 76-77

  Momtaz, Afshin ^a   Cao, Jun ^a   Caresosa, Mario ^a   Hairapitian, Armond ^a   Chung, David ^a   Vakilian, Kambiz ^a   Green, Mike ^a   Tan, Ben ^a   Jen, Keh Chee ^a   Fujimori, Ichiro ^a   Gutierrez, Germn ^a   Cai, Yijun ^a  

^a BROADCOM CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CROSSTALK; DEMULTIPLEXING; ENERGY DISSIPATION; JITTER; PHASE LOCKED LOOPS; TIMING CIRCUITS;

CLOCK AND DATA RECOVERY (CDR); CLOCK MULTIPLICATION UNITS (CMU);

TRANSCEIVERS;

EID: 0035058930     PISSN: 01936530     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISSCC.2001.912553     Document Type: Article

References (5)

1. A variable delay line PLL for CPU-coprocessor synchronization
2. A general theory of phase noise in electrical oscillators
3. A 0.5-3.5Gb/s Low power low jitter serial data CMOS transceiver