A Multifunctional Processing Board for the Fast Track Trigger of the H1 Experiment

IEEE Transactions on Nuclear Science

Volumn 49, Issue 2, 2002, Pages 357-361

  Meer, David ^a   Schöning, André ^a   Müller, David ^b   Müller, Jorg ^b   Wissing, Christoph ^c  

^a ETH ZURICH   (Switzerland)

^b Supercomputing Systems   (Switzerland)

^c TU DORTMUND UNIVERSITY   (Germany)

Author keywords

Content addressable memory (CAM); digital signal processor (DSP); field programmable gate array (FPGA); Hadron Elektron Ring Aniage (HERA); HI collaboration; low voltage differential signaling (LVDS); processor board; supercomputing systems; track trigger; trigger

Indexed keywords

EID: 85008030409     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/TNS.2002.1003736     Document Type: Article

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