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Volumn 48, Issue 4 I, 2001, Pages 1276-1281

A fast high-resolution track trigger for the H1 experiment

Author keywords

Content addressable memory (CAM); Digital signal processor (DSP); Fast track trigger (FTT); Field programmable gate array (FPGA); H1 collaboration; HERA collider; Track trigger; Trigger

Indexed keywords

ALGORITHMS; CHARGED PARTICLES; FIELD PROGRAMMABLE GATE ARRAYS; OPTIMIZATION; THREE DIMENSIONAL;

EID: 0035428750     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.958765     Document Type: Conference Paper
Times cited : (36)

References (12)
  • 5
    • 0006592702 scopus 로고    scopus 로고
    • APEX20K programmable logic device family data sheet, Altera; (Mar.). [Online]
    • (2001)
  • 6
    • 0006576919 scopus 로고    scopus 로고
    • DS90CR483/484: 48 bit LVDS channel link serializer/deserializer, National Semiconductor; (July). [Online]
    • (2000)
  • 7
    • 0006576920 scopus 로고    scopus 로고
    • TMS320C6701: Floating point digital signal processor data sheet, Texas Instruments; (May). [Online]
    • (2000)
  • 12
    • 0006600958 scopus 로고    scopus 로고
    • Code Composer Studio 1.2, Texas Instruments. [Online]


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.