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Volumn 48, Issue 4 I, 2001, Pages 1276-1281
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A fast high-resolution track trigger for the H1 experiment
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Author keywords
Content addressable memory (CAM); Digital signal processor (DSP); Fast track trigger (FTT); Field programmable gate array (FPGA); H1 collaboration; HERA collider; Track trigger; Trigger
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Indexed keywords
ALGORITHMS;
CHARGED PARTICLES;
FIELD PROGRAMMABLE GATE ARRAYS;
OPTIMIZATION;
THREE DIMENSIONAL;
CENTRAL JET CHAMBER;
CONTENT ADDRESSABLE MEMORY;
DIGITAL SIGNAL PROCESSOR;
FAST TRACK TRIGGER;
COLLIDING BEAM ACCELERATORS;
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EID: 0035428750
PISSN: 00189499
EISSN: None
Source Type: Journal
DOI: 10.1109/23.958765 Document Type: Conference Paper |
Times cited : (36)
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References (12)
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