메뉴 건너뛰기




Volumn , Issue , 2001, Pages 82-87

MILAN: A model based integrated simulation framework for design of embedded systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; EMBEDDED SOFTWARE; PROGRAM COMPILERS; SYSTEMS ANALYSIS;

EID: 84994911180     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/384197.384210     Document Type: Conference Paper
Times cited : (32)

References (21)
  • 2
    • 0002982453 scopus 로고    scopus 로고
    • Abstract resource representations for custom design of system-on-chip architectures
    • Submitted to Montpellier, France, December
    • A. Bakshi and V. K. Prasanna, "Abstract Resource Representations for Custom Design of System-on-Chip Architectures," submitted to IFIP VLSI-SOC 2001, Montpellier, France, December 2001
    • (2001) IFIP VLSI-SOC 2001
    • Bakshi, A.1    Prasanna, V.K.2
  • 10
    • 17244363929 scopus 로고    scopus 로고
    • IPCHINOOK: An integrated IP-based design framework for distributed embedded systems
    • June
    • P. Chou et al., "IPCHINOOK: An Integrated IP-based Design Framework for Distributed Embedded Systems," Design Automation Conference, June 1999
    • (1999) Design Automation Conference
    • Chou, P.1
  • 12
    • 0010834395 scopus 로고    scopus 로고
    • Fast cache and bus estimation for parameterized system-on-a-chip design
    • March
    • T. D. Givargis et al., "Fast Cache and Bus Estimation for Parameterized System-on-a-Chip Design," Design, Automation and Test in Europe, March 2000
    • (2000) Design, Automation and Test in Europe
    • Givargis, T.D.1
  • 13
    • 0034780532 scopus 로고    scopus 로고
    • A hierarchical simulation framework for application development on system-on-chip architectures
    • submitted to the Washington DC, September
    • V. Mathur and V. K. Prasanna, "A Hierarchical Simulation Framework for Application Development on System-on-Chip Architectures," submitted to the 14th IEEE Intl. ASIC/SOC Conference, Washington DC, September 2001
    • (2001) 14th IEEE Intl. ASIC/SOC Conference
    • Mathur, V.1    Prasanna, V.K.2
  • 15
    • 3042655913 scopus 로고    scopus 로고
    • Power: A first class design constraint for future architectures
    • Bangalore, India December
    • T. Mudge, "Power: A First Class Design Constraint for Future Architectures," 7th Intl. Conference on High Performance Computing, Bangalore, India, December 2000
    • (2000) 7th Intl. Conference on High Performance Computing
    • Mudge, T.1
  • 18
    • 85028027581 scopus 로고    scopus 로고
    • Simulink 4, http://www.mathworks.com/
    • Simulink 4
  • 21
    • 85028029524 scopus 로고    scopus 로고
    • The universal micro system: Hardware performance with software convenience
    • D. C. Wyland, "The Universal Micro System: Hardware Performance with Software Convenience," Cradle Technologies White Paper, http://www.cradle.com/literature/tech papers.html
    • Cradle Technologies White Paper
    • Wyland, D.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.