Functionality Demonstration of a High-Density 2.5V Self-Aligned Split-Gate NVM Cell Embedded into 40nm CMOS Logic Process for Automotive Microcontrollers

2016 IEEE 8th International Memory Workshop, IMW 2016

Volumn , Issue , 2016, Pages

  Luo, L Q ^a,b   Teo, Z Q ^a   Kong, Y J ^a   Deng, F X ^a   Liu, J Q ^a   Zhang, F ^a   Cai, X S ^a   Tan, K M ^a   Lim, K Y ^a   Khoo, P ^a   Jung, S M ^a   Siah, S Y ^a   Shum, D ^a   Wang, C M ^c   Xing, J C ^c   Liu, G Y ^c   Diao, Y ^c   Lin, G M ^c   Tee, L ^c   Lemke, S M ^c   Ghazavi, P ^c   Liu, X ^c   Do, N ^c   Pey, K L ^b   Shubhakar, K ^b   more..

^a GLOBALFOUNDRIES SINGAPORE PTE LTD   (Singapore)

^b SINGAPORE UNIVERSITY OF TECHNOLOGY AND DESIGN   (Singapore)

^c MICROCHIP TECHNOLOGY INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL MECHANICAL POLISHING; CHEMICAL POLISHING; CMOS INTEGRATED CIRCUITS; MICROCONTROLLERS; RECONFIGURABLE HARDWARE; SMART CARDS;

AUTOMOTIVE MICROCONTROLLERS; AUTOMOTIVE-GRADE; DATA RETENTION; DUAL POWER SUPPLIES; LOW POWER CMOS; LOW POWER MODES; LOW-K INTERCONNECTS; OPERATION TEMPERATURE;

COMPUTER CIRCUITS;

EID: 84984618867     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2016.7495271     Document Type: Conference Paper

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