Hardware neuron models with CMOS for auditory neural networks

ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age

Volumn 3, Issue , 2002, Pages 1325-1329

  Saeki, K ^a   Iidaka, R ^a   Sekine, Y ^a   Aihara, K ^b,c  

^a NIHON UNIVERSITY   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

^c JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; CONTOUR MEASUREMENT; FEATURE EXTRACTION; HARDWARE; INFORMATION SCIENCE; MOSFET DEVICES; NEURONS; RECONFIGURABLE HARDWARE;

DEPLETION MODES; FEATURE DETECTING; HARDWARE IMPLEMENTATIONS; HARDWARE NEURON MODELS; INFORMATION PROCESSING FUNCTIONS; MANUFACTURING PROCESS; MOSFETS; NEURON MODEL;

NEURAL NETWORKS;

EID: 84968624578     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICONIP.2002.1202836     Document Type: Conference Paper

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