Analog hardware implementation of a mathematical model of an asynchronous chaotic neuron

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E85-A, Issue 2, 2002, Pages 389-394

  Matsuoka, Jun ^a   Sekine, Yoshifumi ^a   Saeki, Katsutoshi ^a   Aihara, Kazuyuki ^b  

^a NIHON UNIVERSITY   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

Bifurcation phenomena; Chaotic neuron model; Pulse type hardware neuron model; Return map

Indexed keywords

BIFURCATION (MATHEMATICS); CHAOS THEORY; COMPUTER SIMULATION; MATHEMATICAL MODELS;

ASYNCHRONOUS CHAOTIC NEURONS;

NEURAL NETWORKS;

EID: 0036475430     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (11)

1. Tutorial on neurobiology: From single neurons to brain chaos
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7. Successive learning in chaotic neural network
8. A pulse-type hardware neuron model
9. Two kind of pulse-type hardware neuron models and its application to a recognition circuit
10. Universal type hardware neuron model using lambda-shaped transistor
11. Response characteristics of the Hodgkin-Huxley equations to pulse-train stimulation