Eclipse: Heterogeneous multiprocessor architecture for flexible media processing

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002

Volumn , Issue , 2002, Pages 130-

  Rutten, M J ^a   Van Eijndhoven, J T J ^a   Pol Egbert, E D ^a   Jaspers, G T ^a   Van Der Wolf, P ^a   Gangwal, O P ^a   Timmer, A ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84966570033     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2002.1016517     Document Type: Conference Paper

References (22)

1. G. Kahn, "The Semantics of a Simple Language for Parallel Programming", Proc. of Information Processing '74, August 5-10, Stockholm, Sweden, North-Holland publ. Co., pp. 471-475, 1974.
2. G. Kahn and D.B. MacQueen, "Coroutines and Networks of Parallel Programming", Proc. of Information Processing '77, North Holland publ., pp. 993-998, 1977.
3. B. Kienhuis, E. Rijpkema, and E.F. Deprettere, "Compaan: Deriving Process Networks from Matlab for Embedded Signal Processing Architectures", 8th Int. Workshop on Hardware/Software Codesign (CODES), May 3-5, 2000, San Diego, CA, USA.
4. J.T. Buck, S. Ha, E.A. Lee, and D.G. Messerschmitt, "Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems", Int. Journal of Computer Simulation, special issue on "Simulation Software Development", vol. 4, pp. 155-182, April 1994.
5. S. Panchanatan, O. Fatemi, and T.M. Le, "Survey of Architectures for Media Processing", SPIE Conf. on Input/Output and Imaging Technologies, vol. 3422, pp.199-209, July 1998, Taipei, Taiwan.
6. P. Pirsch and H.J. Stolberg, "Implementation of Media Processors", IEEE Signal Processing Magazine, vol. 14, no. 4, pp. 48-51, July 1997.
7. I. Kuroda and T. Nishitani, "Multimedia Processors", Proc. of the IEEE, vol. 86, no. 6, pp. 1203-1221, June 1998.
8. H. Liao and A. Wolfe, "Available Parallelism in Video Applications," 30th Annual Int. Symposium on Microarchitecture, Dec. 1997.
9. S. Rathnam and G. Slavenburg, "Processing the New World of Interactive Media", IEEE Signal Processing Magazine, vol. 15, no. 2, pp. 108-117, March 1998.
10. J.T.J. van Eijndhoven, et al., "TriMedia CPU64 Architecture", Proc. Int. Conf. on Computer Design (ICCD '99), Austin, Texas, pp. 586-592, October 10-13, 1999.
11. W. Lee and C. Basoglu, "MPEG-2 Decoder Implementation on MAP-CA Mediaprocessor using the C Language", Proc. of the SPIE: Media Processors 2000, vol. 3970, Jan. 2000.
12. P. Kalapathy, "Hardware/Software Interactions on Mpact", IEEE Micro, vol. 17, no. 2, pp. 20-26, March/April 1997.
13. E.G.T. Jaspers and P.H.N. de With, "Architecture of Embedded Video Processing in a Multimedia Chip-set", Proc. of IEEE Int. Conf. on Image Proc,(ICIP 99), vol. 2, pp. 787-791, Oct. 1999, Kobe, Japan.
14. V.M. Bove, Jr. and J.A. Watlington, "Cheops: A reconfigurable Data-flow System for Video Processing", IEEE trans. On Circuits and Systems for Video Technology, vol. 5, no. 2, pp. 140-149, April 1995.
15. G. de-Haan, J. Kettenis, A. Loning, and B. De-Loore, "IC for motion-compensated 100 Hz TV with natural-motion movie-mode", IEEE Trans. on Consumer Electronics, vol. 42, no. 2, pp. 165-174, May 1996.
16. S. Dutta, R. Jensen, and A. Rieckmann, "Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems", IEEE Design and Test of Computers, pp. 21-31, September-Oct. 2001.
17. D. Wingard and A. Kurosawa, "Integration Architecture for System-on-a-Chip Design", Proc. of the IEEE 1998 Custom Circuits Conference, pp. 85-88, May 1998
18. D.C. Wyland, "Media Processors Using a New Microsystem Architecture Designed for the Internet Era", Proc. of the SPIE: Media Processors 2000, vol. 3970, pp. 2-15, Jan. 2000.
19. R.J. Grove, G.J. Hewlett, and D.B. Doherty, "The MVP: A Single-Chip Processor for Advanced Television Applications", Proc. of the Int. Workshop on Signal Processing of HDTV, vol. 6, pp. 479-487, Oct. 1994, Turin, Italy.
20. O.P. Gangwal, A. Nieuwland, and P. Lippens, "A Scalable and Flexible Data Synchronization Scheme for Embedded HW-SW Shared-Memory Systems", Int. Symp. On System Synthesis (ISSS), pp. 1-6, Montréal, Canada, Oct. 2001.
21. M.J. Rutten, J.T.J. van Eijndhoven, E.J.D. Pol, "Robust media processing in a flexible and cost-effective network of multi-tasking coprocessors", Euromicro Conf. on Real-Time Systems, Vienna, Austria, submitted for publication.
22. E.B. van der Tol and E.G.T. Jaspers, "Mapping of MPEG-4 decoding on a flexible architecture platform", Media Processors 2002, vol. 4674, Jan. 2002, San Jose, CA, USA.