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Volumn 2, Issue , 1999, Pages 560-565

Digital VLSI implementation of a multi-precision neural network classifier

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE; NEURONS; RECONFIGURABLE HARDWARE; VLSI CIRCUITS;

EID: 84964548223     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICONIP.1999.845655     Document Type: Conference Paper
Times cited : (5)

References (17)
  • 2
    • 0023843391 scopus 로고
    • Analysis of hidden units in a layered network trained to classify sonar targets
    • R. P. Gorman and T, J, Sejnowski, "Analysis of hidden units in a layered network trained to classify sonar targets," Neural Networks, Vol. 1, pp. 75-89, 1988.
    • (1988) Neural Networks , vol.1 , pp. 75-89
    • Gorman, R.P.1    Sejnowski, T.J.2
  • 3
    • 36149031331 scopus 로고
    • Learning in feedforward neural networks: The tiling algorithm
    • M. Mfoard and J, P. Nadal, "Learning in feedforward neural networks: the tiling algorithm," J, Phys. A: Math. Gen, Vol. 22, pp. 2191-2203, 1989.
    • (1989) J, Phys. A: Math. Gen , vol.22 , pp. 2191-2203
    • Mfoard, M.1    Nadal, J.P.2
  • 4
    • 0001653370 scopus 로고
    • Bounds on the learning capacity of some multi-layer networks
    • G, J. Mitchison and R. M. Durbin, "Bounds on the learning capacity of some multi-layer networks," Biol Cybern, 60, pp. 345-356, 1989.
    • (1989) Biol Cybern , vol.60 , pp. 345-356
    • Mitchison, G.J.1    Durbin, R.M.2
  • 5
    • 84956068504 scopus 로고
    • The offset algorithm: Building and learning method for multilayer neural networks
    • D. Martinez and D. Estevc, "The Offset Algorithm: Building and Learning Method for Multilayer Neural Networks," Europhys. Lett, 18 (2), pp. 95-100, 1992.
    • (1992) Europhys. Lett , vol.18 , Issue.2 , pp. 95-100
    • Martinez, D.1    Estevc, D.2
  • 6
    • 0029768201 scopus 로고    scopus 로고
    • A convergence theorem for incremental learning with real-valued inputs
    • Washington
    • M. B. Gordon, "A convergence theorem for incremental learning with real-valued inputs," Proceedings of International Conference on Neural Networks, pp. 381-386, Washington, 1996.
    • (1996) Proceedings of International Conference on Neural Networks , pp. 381-386
    • Gordon, M.B.1
  • 9
    • 0027557033 scopus 로고
    • Finite precision error analysis of neural network hardware implementations
    • J. Holt and J.N. Hwang, "Finite precision error analysis of neural network hardware implementations," IEEE trans. Computers, vol. 42, pp. 281-290, 1993.
    • (1993) IEEE Trans. Computers , vol.42 , pp. 281-290
    • Holt, J.1    Hwang, J.N.2
  • 10
    • 0029267941 scopus 로고
    • The selection of weight accuracies for madalines
    • S. W. Piche, "The Selection of Weight Accuracies for Madalines," IEEE trans, on Neural Networks, vol. 6, no. 2 pp. 432-455, 1995.
    • (1995) IEEE Trans, on Neural Networks , vol.6 , Issue.2 , pp. 432-455
    • Piche, S.W.1
  • 11
  • 12
    • 85041347982 scopus 로고
    • Micro Devices
    • "MD 1220 Data Sheet," Micro Devices, 1990
    • (1990) MD 1220 Data Sheet
  • 15
    • 0026869642 scopus 로고
    • Lneuro 1.0: A piece of Hardware LEGO for building neural network systems
    • May
    • N. Mauduit, M. Duranton, J. Gobert, and .1. A. Sirat "Lneuro 1.0: A piece of Hardware LEGO for building neural network systems," IEEE transactions on Neural Networks, Vol.3, N.3, pp.414-422, May. 1992.
    • (1992) IEEE Transactions on Neural Networks , vol.3 , Issue.3 , pp. 414-422
    • Mauduit, N.1    Duranton, M.2    Gobert, J.3    Sirat, J.A.4
  • 16
    • 0025532312 scopus 로고
    • A VLSI architecture for high performance, low cost, on chip learning
    • San Diego, Ca., USA
    • D. Ilammerstrom, "A VLSI architecture for high performance, low cost, on chip learning," Proceedings of the IJCNN'90, pp.537-544, San Diego, Ca., USA, 1990.
    • (1990) Proceedings of the IJCNN'90 , pp. 537-544
    • Ilammerstrom, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.