-
1
-
-
84888034261
-
Chemical micro-sensors
-
M. Dilhan, D. Martinez and N. Jaffrezic, "Chemical micro-sensors," L 'onde Electrique, Vol. 74, no. 2 pp. 28-35, 1994.
-
(1994)
L'Onde Electrique
, vol.74
, Issue.2
, pp. 28-35
-
-
Dilhan, M.1
Martinez, D.2
Jaffrezic, N.3
-
2
-
-
0023843391
-
Analysis of hidden units in a layered network trained to classify sonar targets
-
R. P. Gorman and T, J, Sejnowski, "Analysis of hidden units in a layered network trained to classify sonar targets," Neural Networks, Vol. 1, pp. 75-89, 1988.
-
(1988)
Neural Networks
, vol.1
, pp. 75-89
-
-
Gorman, R.P.1
Sejnowski, T.J.2
-
3
-
-
36149031331
-
Learning in feedforward neural networks: The tiling algorithm
-
M. Mfoard and J, P. Nadal, "Learning in feedforward neural networks: the tiling algorithm," J, Phys. A: Math. Gen, Vol. 22, pp. 2191-2203, 1989.
-
(1989)
J, Phys. A: Math. Gen
, vol.22
, pp. 2191-2203
-
-
Mfoard, M.1
Nadal, J.P.2
-
4
-
-
0001653370
-
Bounds on the learning capacity of some multi-layer networks
-
G, J. Mitchison and R. M. Durbin, "Bounds on the learning capacity of some multi-layer networks," Biol Cybern, 60, pp. 345-356, 1989.
-
(1989)
Biol Cybern
, vol.60
, pp. 345-356
-
-
Mitchison, G.J.1
Durbin, R.M.2
-
5
-
-
84956068504
-
The offset algorithm: Building and learning method for multilayer neural networks
-
D. Martinez and D. Estevc, "The Offset Algorithm: Building and Learning Method for Multilayer Neural Networks," Europhys. Lett, 18 (2), pp. 95-100, 1992.
-
(1992)
Europhys. Lett
, vol.18
, Issue.2
, pp. 95-100
-
-
Martinez, D.1
Estevc, D.2
-
6
-
-
0029768201
-
A convergence theorem for incremental learning with real-valued inputs
-
Washington
-
M. B. Gordon, "A convergence theorem for incremental learning with real-valued inputs," Proceedings of International Conference on Neural Networks, pp. 381-386, Washington, 1996.
-
(1996)
Proceedings of International Conference on Neural Networks
, pp. 381-386
-
-
Gordon, M.B.1
-
7
-
-
85041324386
-
The dynamic ring architecture
-
Brighton, England, September
-
F. Castillo, J. Cabestany and J.M. Moreno, "The Dynamic Ring Architecture," Proceedings of 1CANN'92, Brighton, England, September 1992.
-
(1992)
Proceedings of 1CANN'92
-
-
Castillo, F.1
Cabestany, J.2
Moreno, J.M.3
-
8
-
-
85041357888
-
-
Ph. D. thesis N3064, Paul Sabatier University, Toulouse, Franco
-
A. Bermak, "Sysneuro: A multiprecision neural systolic circuit for classification tasks," Ph.D thesis N3064, Paul Sabatier University, Toulouse, Franco, 1998.
-
(1998)
Sysneuro: A Multiprecision Neural Systolic Circuit for Classification Tasks
-
-
Bermak, A.1
-
9
-
-
0027557033
-
Finite precision error analysis of neural network hardware implementations
-
J. Holt and J.N. Hwang, "Finite precision error analysis of neural network hardware implementations," IEEE trans. Computers, vol. 42, pp. 281-290, 1993.
-
(1993)
IEEE Trans. Computers
, vol.42
, pp. 281-290
-
-
Holt, J.1
Hwang, J.N.2
-
10
-
-
0029267941
-
The selection of weight accuracies for madalines
-
S. W. Piche, "The Selection of Weight Accuracies for Madalines," IEEE trans, on Neural Networks, vol. 6, no. 2 pp. 432-455, 1995.
-
(1995)
IEEE Trans, on Neural Networks
, vol.6
, Issue.2
, pp. 432-455
-
-
Piche, S.W.1
-
11
-
-
0031249433
-
High-density 16/8/4-bit configurable multiplier
-
Oct
-
A. Bonnak, D. Martinez, J.L Noullet, "High-density 16/8/4-bit configurable multiplier," IEE Proc. Circuits Devices Syst, Vol.144, N.5, pp.272-276, Oct. 1997.
-
(1997)
IEE Proc. Circuits Devices Syst
, vol.144
, Issue.5
, pp. 272-276
-
-
Bonnak, A.1
Martinez, D.2
Noullet, J.L.3
-
12
-
-
85041347982
-
-
Micro Devices
-
"MD 1220 Data Sheet," Micro Devices, 1990
-
(1990)
MD 1220 Data Sheet
-
-
-
13
-
-
0242423829
-
SIOP: Application-specific neural hardware
-
Dresden, Germany
-
B, Friebo, S. Neusser and B. Ilofflingcv, "SIOP: Application-Specific Neural Hardware," Proceedings of the 6th International Conference on Micivelectronics for Neural Networks and Fuzzy Systems, MicroNeuro 07, pp. 18-24, Dresden, Germany, 1997.
-
(1997)
Proceedings of the 6th International Conference on Micivelectronics for Neural Networks and Fuzzy Systems, MicroNeuro 07
, pp. 18-24
-
-
Friebo, B.1
Neusser, S.2
Ilofflingcv, B.3
-
14
-
-
84964540727
-
High speed neural network chip on PCI board
-
Dresden, Germany
-
W. Eppler, T, Fischer, H. Gemmeke, T. Becker and G. Kock, "High Speed Neural Network Chip on PCI board," Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, MicroNeuro 97, pp. 18-24, Dresden, Germany, 1997
-
(1997)
Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, MicroNeuro
, vol.97
, pp. 18-24
-
-
Eppler, W.1
Fischer, T.2
Gemmeke, H.3
Becker, T.4
Kock, G.5
-
15
-
-
0026869642
-
Lneuro 1.0: A piece of Hardware LEGO for building neural network systems
-
May
-
N. Mauduit, M. Duranton, J. Gobert, and .1. A. Sirat "Lneuro 1.0: A piece of Hardware LEGO for building neural network systems," IEEE transactions on Neural Networks, Vol.3, N.3, pp.414-422, May. 1992.
-
(1992)
IEEE Transactions on Neural Networks
, vol.3
, Issue.3
, pp. 414-422
-
-
Mauduit, N.1
Duranton, M.2
Gobert, J.3
Sirat, J.A.4
-
16
-
-
0025532312
-
A VLSI architecture for high performance, low cost, on chip learning
-
San Diego, Ca., USA
-
D. Ilammerstrom, "A VLSI architecture for high performance, low cost, on chip learning," Proceedings of the IJCNN'90, pp.537-544, San Diego, Ca., USA, 1990.
-
(1990)
Proceedings of the IJCNN'90
, pp. 537-544
-
-
Ilammerstrom, D.1
-
17
-
-
0026382865
-
Architecture of a general-purpose neural signal processor
-
Juillet
-
U. Ramacher, J. Beichter and N. Bruls "Architecture of a general-purpose neural signal processor," Proceedings of the International Joint Conference on Neural Networks, Volume I, pp.443-446, Juillet 1991.
-
(1991)
Proceedings of the International Joint Conference on Neural Networks
, vol.1
, pp. 443-446
-
-
Ramacher, U.1
Beichter, J.2
Bruls, N.3
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