Pipelined Function Evaluation on FPGAs

Proceedings - 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2001

Volumn , Issue , 2001, Pages 304-306

  Boullis, N ^a   Mencer, O ^b   Luk, W ^c   Styles, H ^c  

^a UNIVERSITÉ DE LYON   (France)

^b LUCENT TECHNOLOGIES   (United States)

^c IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ASSOCIATIVE STORAGE; COMPUTERS; ECONOMIC AND SOCIAL EFFECTS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FUNCTION EVALUATION; RECONFIGURABLE HARDWARE; TABLE LOOKUP;

APPROXIMATION ERRORS; DATA WIDTH; DIFFERENTIABLE FUNCTIONS; HARDWARE UNITS; PARAMETERIZING; ROUNDING ERRORS; SHIFT-AND-ADD; TRADE OFF;

PARAMETER ESTIMATION;

EID: 84963984709     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. O. Mencer, M. Morf and M.J. Flynn, "PAM-Blox: High Performance FPGA Design for Adaptive Computing," Proc. IEEE Symp. on FPGAs for Custom Computing Machines, IEEE Computer Society Press, pp. 167-174, 1998.
2. O. Mencer, Rational Arithmetic Units in Computer Systems, PhD Thesis (with M.J. Flynn), E.E. Dept., Stanford University, Jan. 2000.
3. O. Mencer, H. Huebert, M. Morf and M.J. Flynn, "StReAm: Object-Oriented Programming of Stream Architectures using PAM-Blox", Field-Programmable Logic and Applications, LNCS 1896, Springer, pp. 595-604, 2000.
4. J.M. Muller, Elementary Functions, Algorithms and Implementation, Birkhaeuser, Boston, 1997.
5. M.J. Schulte and J.E. Stine, "Approximating Elementary Functions with Symmetric Bipartite Tables", IEEE Trans. Comput., Vol. 48, No. 8, pp. 842-847, August 1999.