PAM-Blox: High performance FPGA design for adaptive computing

Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998

Volumn 1998-April, Issue , 1998, Pages 167-174

  Mencer, O ^a   Morf, M ^a   Flynn, M J ^a  

^a Department of Electrical Engineering ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

C++ (PROGRAMMING LANGUAGE); CODES (SYMBOLS); COMPUTERS; CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

ADAPTIVE COMPUTING; ARITHMETIC UNIT; AUTOMATIC PLACEMENT; DESIGN ENVIRONMENT; DESIGN HIERARCHY; HARDWARE OBJECTS; OBJECT INTERFACES; OBJECT ORIENTED;

INTEGRATED CIRCUIT DESIGN;

EID: 84956861824     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.1998.707894     Document Type: Conference Paper

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