Design of a low-power fixed-point 16-bit digital signal processor using 65nm SOTB process

2015 International Conference on IC Design and Technology, ICICDT 2015

Volumn , Issue , 2015, Pages

  Le, Duc Hung ^a,c   Sugii, Nobuyuki ^b   Kamohara, Shiro ^b   Nguyen, Xuan Thuan ^a   Ishibashi, Koichiro ^a   Pham, Cong Kha ^a  

^a UNIVERSITY OF ELECTRO COMMUNICATIONS   (Japan)

^b Low power Electronics Association and Project (LEAP)   (Japan)

^c UNIVERSITY OF NATURAL SCIENCES   (Viet Nam)

Author keywords

DSP; Fixed point; Low power; SOTB

Indexed keywords

DESIGN; DIGITAL SIGNAL PROCESSING; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUIT DESIGN; SIGNAL PROCESSING;

DIGITAL SIGNAL PROCESSORS (DSP); FIXED POINTS; HARVARD ARCHITECTURES; LOW POWER; LOW-POWER CONSUMPTION; MULTIPLY ACCUMULATORS; OPERATION FREQUENCY; SOTB;

DIGITAL SIGNAL PROCESSORS;

EID: 84962901039     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICICDT.2015.7165918     Document Type: Conference Paper

References (9)

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