Lithography process development for 20 nm MOSFET devices

2002 International Microprocesses and Nanotechnology Conference, MNC 2002

Volumn , Issue , 2002, Pages 124-125

  Mollard, L ^a   Dal'zotto, B ^a   Tedesco, S ^a   Bertrand, G ^a   Foucher, J ^b  

^a CEA GRENOBLE   (France)

^b Laboratoire Interdisciplinaire de Physique   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON BEAM LITHOGRAPHY; MASKS; MOSFET DEVICES; NANOTECHNOLOGY; PHOTORESISTS;

CHEMICALLY AMPLIFIED RESIST; HARD MASKS; HIGH RESOLUTION; LITHOGRAPHIC PROCESS; LITHOGRAPHY PROCESS; LOW RESOLUTION; SUMITOMO; VERTICAL PROFILE;

LITHOGRAPHY;

EID: 84960377850     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMNC.2002.1178575     Document Type: Conference Paper

References (2)

1. F. Van Delft and al, JVSTB, 18(6) (2000), p 3419-3423
2. S.Tedesco et al, JVST B16 (6), Nov/Dec 1998 p.3696