Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1166, Issue , 1996, Pages 79-93

  Rueß, Harald ^a  

^a UNIVERSITY OF ULM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL LINGUISTICS; COMPUTER AIDED DESIGN; ITERATIVE METHODS; RECONFIGURABLE HARDWARE; SPECIFICATION LANGUAGES; SPECIFICATIONS;

ARRAY MULTIPLIERS; AUTOMATED VERIFICATION; DECISION PROCEDURE; HIERARCHICAL VERIFICATION; HIGH LEVEL SPECIFICATION; PROOF CHECKERS; THEOREM PROVERS; TIGHT INTEGRATIONS;

FORMAL METHODS;

EID: 84957706271     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/BFb0031801     Document Type: Conference Paper

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